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| author |   Dmitry Osipenko <digetx@gmail.com> | 2019-10-25 01:14:13 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2019-10-29 20:29:17 +0100 |
| commit | 5ac1505008691d32734b890130e5f637f5c4bc5c (patch) | |
| tree | 51e8e8bbeab9aa4cc16e5a18efbcb4fbb7bff974 /arch/arm/boot/dts/tegra20-trimslice.dts | |
| parent | ARM: tegra: paz00: Set up voltage regulators for DVFS (diff) | |
| download | linux-dev-5ac1505008691d32734b890130e5f637f5c4bc5c.tar.xz linux-dev-5ac1505008691d32734b890130e5f637f5c4bc5c.zip | |
ARM: tegra: paz00: Add CPU Operating Performance Points
Utilize common Tegra20 CPU OPP table. CPU DVFS is available now on
AC100.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-trimslice.dts')
0 files changed, 0 insertions, 0 deletions