diff options
| author |   Dmitry Osipenko <digetx@gmail.com> | 2020-11-23 03:27:16 +0300 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2020-11-26 19:06:47 +0100 |
| commit | 8b809ba66c29abb0203d43118c31027e43e43648 (patch) | |
| tree | deb291d541f550fd63742b0753f7779a8cd6b74d /arch/arm/boot/dts/tegra20.dtsi | |
| parent | ARM: tegra: Properly align clocks for SOCTHERM (diff) | |
| download | linux-dev-8b809ba66c29abb0203d43118c31027e43e43648.tar.xz linux-dev-8b809ba66c29abb0203d43118c31027e43e43648.zip | |
ARM: tegra: Correct EMC registers size in Tegra20 device-tree
Fix the size of Tegra20 EMC registers, which should be twice bigger.
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 72a4211a618f..9347f7789245 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -634,7 +634,7 @@ memory-controller@7000f400 { compatible = "nvidia,tegra20-emc"; - reg = <0x7000f400 0x200>; + reg = <0x7000f400 0x400>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_EMC>; #address-cells = <1>; |