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| author |   Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-08-31 18:38:16 +0200 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2018-09-26 16:45:51 +0200 |
| commit | b57d6b996ebe25e7f1e92de0abc7a2da42005454 (patch) | |
| tree | afe9bde6cb128f3eb0adcb386141487e44cef1dc /arch/arm/boot/dts/tegra30-apalis.dtsi | |
| parent | ARM: tegra: apalis_t30: move hda node from carrier to module (diff) | |
| download | linux-dev-b57d6b996ebe25e7f1e92de0abc7a2da42005454.tar.xz linux-dev-b57d6b996ebe25e7f1e92de0abc7a2da42005454.zip | |
ARM: tegra: apalis_t30: support v1.1 hardware revision
Support the V1.1 hardware revisions with the following change:
Changed power rail for MMC1 interface to a 3.3V/1.8V switchable rail in
order to be able to run UHS SD cards in ultra high speed 1.8V mode.
[ 207.502011] mmc2: host does not support reading read-only switch,
assuming write-enable
[ 207.517011] mmc2: new ultra high speed SDR104 SDHC card at address
aaaa
[ 207.534190] mmcblk2: mmc2:aaaa SE32G 29.7 GiB
[ 207.545096] mmcblk2: p1
root@apalis-t30:~# cat /sys/kernel/debug/mmc2/ios
clock: 208000000 Hz
actual clock: 204000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 2 (4 bits)
timing spec: 6 (sd uhs SDR104)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
root@apalis-t30:~# hdparm -t /dev/mmcblk2
/dev/mmcblk2:
Timing buffered disk reads: 256 MB in 3.02 seconds = 84.71 MB/sec
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30-apalis.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra30-apalis.dtsi | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi index 23cecd327172..7f112f192fe9 100644 --- a/arch/arm/boot/dts/tegra30-apalis.dtsi +++ b/arch/arm/boot/dts/tegra30-apalis.dtsi @@ -3,8 +3,7 @@ /* * Toradex Apalis T30 Module Device Tree - * Compatible for Revisions 1GB: V1.0A, V1.1A; 1GB IT: V1.1A; - * 2GB: V1.0B, V1.0C, V1.0E, V1.1A + * Compatible for Revisions 1GB: V1.0A; 2GB: V1.0B, V1.0C, V1.0E */ / { memory@80000000 { |