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authorMasahiro Yamada <yamada.masahiro@socionext.com>2018-07-20 17:50:44 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2018-08-28 23:14:50 +0900
commit007a93891dca11dc6f62866ab0c1e25a0db6422c (patch)
tree672361cd5e6ba2c1844da71724d0d2ecf8ed8de7 /arch/arm/boot/dts/uniphier-pro4.dtsi
parentLinux 4.19-rc1 (diff)
downloadlinux-dev-007a93891dca11dc6f62866ab0c1e25a0db6422c.tar.xz
linux-dev-007a93891dca11dc6f62866ab0c1e25a0db6422c.zip
ARM: uniphier: dts: add more clocks to Denali NAND controller node
Catch up with the new binding of the Denali IP where three clocks, "nand", "nand_x", "ecc" are required. For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they are both 200MHz. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-pro4.dtsi')
-rw-r--r--arch/arm/boot/dts/uniphier-pro4.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 49539f035219..da88ccc4fc80 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -394,7 +394,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};