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authorKishon Vijay Abraham I <kishon@ti.com>2020-01-28 12:11:47 +0530
committerTony Lindgren <tony@atomide.com>2020-02-26 10:38:29 -0800
commit27f13774654ea6bd0b6fc9b97cce8d19e5735661 (patch)
tree0404c56888015f31d402266651f042a925ae0d1a /arch/arm/boot
parentARM: dts: dra7-l4: mark timer13-16 as pwm capable (diff)
downloadlinux-dev-27f13774654ea6bd0b6fc9b97cce8d19e5735661.tar.xz
linux-dev-27f13774654ea6bd0b6fc9b97cce8d19e5735661.zip
ARM: dts: dra7: Add "dma-ranges" property to PCIe RC DT nodes
'dma-ranges' in a PCI bridge node does correctly set dma masks for PCI devices not described in the DT. Certain DRA7 platforms (e.g., DRA76) has RAM above 32-bit boundary (accessible with LPAE config) though the PCIe bridge will be able to access only 32-bits. Add 'dma-ranges' property in PCIe RC DT nodes to indicate the host bridge can access only 32 bits. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d78b684e7fca..4305051bb769 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -184,6 +184,7 @@
device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x20013000 0x13000 0 0xffed000>;
+ dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;
@@ -238,6 +239,7 @@
device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x30013000 0x13000 0 0xffed000>;
+ dma-ranges = <0x02000000 0x0 0x00000000 0x00000000 0x1 0x00000000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>;
num-lanes = <1>;