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| author |   Catalin Marinas <catalin.marinas@arm.com> | 2007-02-05 14:48:19 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-11 16:48:02 +0000 |
| commit | 382266ad5ad4119ec12df889afa5062a0a0cd6ae (patch) | |
| tree | c340fff36f041a8009f72a6e4c392aff324559c2 /arch/arm/common | |
| parent | [ARM] Always mark ARMv6 PTWs outer cacheable (diff) | |
| download | linux-dev-382266ad5ad4119ec12df889afa5062a0a0cd6ae.tar.xz linux-dev-382266ad5ad4119ec12df889afa5062a0a0cd6ae.zip | |
[ARM] 4135/1: Add support for the L210/L220 cache controllers
This patch adds the support for the L210/L220 (outer) cache
controller. The cache range operations are done by index/way since L2
cache controller only accepts physical addresses.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/common')
0 files changed, 0 insertions, 0 deletions