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| author |   Will Deacon <will.deacon@arm.com> | 2013-10-09 17:19:22 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2013-10-29 11:06:11 +0000 |
| commit | 0cbad9c9dfe0c38e8ec7385b39087c005a6dee3e (patch) | |
| tree | c835625cbf2eb478134713fe1df99ca5e4e9bbf3 /arch/arm/include/asm/cputype.h | |
| parent | ARM: 7853/1: cmpxchg: implement cmpxchg64_relaxed (diff) | |
| download | linux-dev-0cbad9c9dfe0c38e8ec7385b39087c005a6dee3e.tar.xz linux-dev-0cbad9c9dfe0c38e8ec7385b39087c005a6dee3e.zip | |
ARM: 7854/1: lockref: add support for lockless lockrefs using cmpxchg64
Our spinlocks are only 32-bit (2x16-bit tickets) and, on processors
with 64-bit atomic instructions, cmpxchg64 makes use of the double-word
exclusive accessors.
This patch wires up the cmpxchg-based lockless lockref implementation
for ARM.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/cputype.h')
0 files changed, 0 insertions, 0 deletions