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authorHerbert Xu <herbert@gondor.apana.org.au>2009-12-01 15:16:22 +0800
committerHerbert Xu <herbert@gondor.apana.org.au>2009-12-01 15:16:22 +0800
commit838632438145ac6863377eb12d8b8eef9c55d288 (patch)
treefbb0757df837f3c75a99c518a3596c38daef162d /arch/arm/include/asm/cputype.h
parenthwrng: core - Replace u32 in driver API with byte array (diff)
parentMerge branch 'security' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-2.6 (diff)
downloadlinux-dev-838632438145ac6863377eb12d8b8eef9c55d288.tar.xz
linux-dev-838632438145ac6863377eb12d8b8eef9c55d288.zip
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/arm/include/asm/cputype.h')
-rw-r--r--arch/arm/include/asm/cputype.h10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index b3e656c6fb78..20ae96cc0020 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -63,6 +63,11 @@ static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
return read_cpuid(CPUID_CACHETYPE);
}
+static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void)
+{
+ return read_cpuid(CPUID_TCM);
+}
+
/*
* Intel's XScale3 core supports some v6 features (supersections, L2)
* but advertises itself as v5 as it does not support the v6 ISA. For
@@ -73,7 +78,10 @@ static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
#else
static inline int cpu_is_xsc3(void)
{
- if ((read_cpuid_id() & 0xffffe000) == 0x69056000)
+ unsigned int id;
+ id = read_cpuid_id() & 0xffffe000;
+ /* It covers both Intel ID and Marvell ID */
+ if ((id == 0x69056000) || (id == 0x56056000))
return 1;
return 0;