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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-08-29 16:34:07 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-08-29 16:34:07 -0700 |
commit | 90e93648c41bd29a72f6ec55ce27a23c209eab8c (patch) | |
tree | 705afc522c361f681567187018d80cf028fcb334 /arch/arm/include/asm/hardware/cache-l2x0.h | |
parent | Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc (diff) | |
parent | ARM: pm: avoid writing the auxillary control register for ARMv7 (diff) | |
download | linux-dev-90e93648c41bd29a72f6ec55ce27a23c209eab8c.tar.xz linux-dev-90e93648c41bd29a72f6ec55ce27a23c209eab8c.zip |
Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: pm: avoid writing the auxillary control register for ARMv7
ARM: pm: some ARMv7 requires a dsb in resume to ensure correctness
ARM: pm: arm920/926: fix number of registers saved
ARM: pm: CPU specific code should not overwrite r1 (v:p offset)
ARM: 7066/1: proc-v7: disable SCTLR.TE when disabling MMU
ARM: 7065/1: kexec: ensure new kernel is entered in ARM state
ARM: 7003/1: vexpress: Add clock definition for the SP805.
ARM: 7051/1: cpuimx* boards: fix mach-types errors
ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDER
ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.
ARM: 6967/1: ep93xx: ts72xx: fix board model detection
ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boards
ARM: cache: detect VIPT aliasing I-cache on ARMv6
ARM: twd: register clockevents device before enabling PPI
ARM: realview: ensure visibility of writes during reset
ARM: perf: make name of arm_pmu_type consistent
ARM: perf: fix prototype of release_pmu
ARM: fix perf build with uclibc toolchains
Diffstat (limited to 'arch/arm/include/asm/hardware/cache-l2x0.h')
-rw-r--r-- | arch/arm/include/asm/hardware/cache-l2x0.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h index 16bd48031583..bfa706ffd968 100644 --- a/arch/arm/include/asm/hardware/cache-l2x0.h +++ b/arch/arm/include/asm/hardware/cache-l2x0.h @@ -64,7 +64,7 @@ #define L2X0_AUX_CTRL_MASK 0xc0000fff #define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT 16 #define L2X0_AUX_CTRL_WAY_SIZE_SHIFT 17 -#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17) +#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x7 << 17) #define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT 22 #define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT 26 #define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT 27 |