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authorMarc Zyngier <marc.zyngier@arm.com>2016-01-29 15:01:28 +0000
committerMarc Zyngier <marc.zyngier@arm.com>2016-02-29 18:34:15 +0000
commit57c841f131ef295b583365d2fddd6b0d16e82c10 (patch)
treee015fcf1eccbcc2d01f87762cddb29738e1a3bf8 /arch/arm/include/asm/kvm_emulate.h
parentARM: KVM: Remove __kvm_hyp_exit/__kvm_hyp_exit_end (diff)
downloadlinux-dev-57c841f131ef295b583365d2fddd6b0d16e82c10.tar.xz
linux-dev-57c841f131ef295b583365d2fddd6b0d16e82c10.zip
arm/arm64: KVM: Handle out-of-RAM cache maintenance as a NOP
So far, our handling of cache maintenance by VA has been pretty simple: Either the access is in the guest RAM and generates a S2 fault, which results in the page being mapped RW, or we go down the io_mem_abort() path, and nuke the guest. The first one is fine, but the second one is extremely weird. Treating the CM as an I/O is wrong, and nothing in the ARM ARM indicates that we should generate a fault for something that cannot end-up in the cache anyway (even if the guest maps it, it will keep on faulting at stage-2 for emulation). So let's just skip this instruction, and let the guest get away with it. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/include/asm/kvm_emulate.h')
-rw-r--r--arch/arm/include/asm/kvm_emulate.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/include/asm/kvm_emulate.h b/arch/arm/include/asm/kvm_emulate.h
index 8a8c6ded9ca7..ee5328fc4b06 100644
--- a/arch/arm/include/asm/kvm_emulate.h
+++ b/arch/arm/include/asm/kvm_emulate.h
@@ -138,6 +138,11 @@ static inline bool kvm_vcpu_dabt_iss1tw(struct kvm_vcpu *vcpu)
return kvm_vcpu_get_hsr(vcpu) & HSR_DABT_S1PTW;
}
+static inline bool kvm_vcpu_dabt_is_cm(struct kvm_vcpu *vcpu)
+{
+ return !!(kvm_vcpu_get_hsr(vcpu) & HSR_DABT_CM);
+}
+
/* Get Access Size from a data abort */
static inline int kvm_vcpu_dabt_get_as(struct kvm_vcpu *vcpu)
{