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authorVladimir Murzin <vladimir.murzin@arm.com>2018-04-03 10:39:23 +0100
committerRussell King <rmk+kernel@armlinux.org.uk>2018-05-19 11:53:46 +0100
commit046835b4aa22b9ab6aa0bb274e3b71047c4b887d (patch)
tree1f1e8dc8ed4c30f03ba51d930a6f79a923959937 /arch/arm/include/asm/v7m.h
parentARM: 8756/1: NOMMU: Postpone MPU activation till __after_proc_init (diff)
downloadlinux-dev-046835b4aa22b9ab6aa0bb274e3b71047c4b887d.tar.xz
linux-dev-046835b4aa22b9ab6aa0bb274e3b71047c4b887d.zip
ARM: 8757/1: NOMMU: Support PMSAv8 MPU
ARMv8R/M architecture defines new memory protection scheme - PMSAv8 which is not compatible with PMSAv7. Key differences to PMSAv7 are: - Region geometry is defined by base and limit addresses - Addresses need to be either 32 or 64 byte aligned - No region priority due to overlapping regions are not allowed - It is unified, i.e. no distinction between data/instruction regions - Memory attributes are controlled via MAIR This patch implements support for PMSAv8 MPU defined by ARMv8R/M architecture. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/v7m.h')
-rw-r--r--arch/arm/include/asm/v7m.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/v7m.h b/arch/arm/include/asm/v7m.h
index aba49e0b3ebe..187ccf6496ad 100644
--- a/arch/arm/include/asm/v7m.h
+++ b/arch/arm/include/asm/v7m.h
@@ -68,6 +68,14 @@
#define PMSAv7_RBAR 0x9c
#define PMSAv7_RASR 0xa0
+#define PMSAv8_RNR 0x98
+#define PMSAv8_RBAR 0x9c
+#define PMSAv8_RLAR 0xa0
+#define PMSAv8_RBAR_A(n) (PMSAv8_RBAR + 8*(n))
+#define PMSAv8_RLAR_A(n) (PMSAv8_RLAR + 8*(n))
+#define PMSAv8_MAIR0 0xc0
+#define PMSAv8_MAIR1 0xc4
+
/* Cache opeartions */
#define V7M_SCB_ICIALLU 0x250 /* I-cache invalidate all to PoU */
#define V7M_SCB_ICIMVAU 0x258 /* I-cache invalidate by MVA to PoU */