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authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-05 13:44:27 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-05 13:44:27 -0700
commit9f800363bb0ea459e15bef0928a72c88d374e489 (patch)
tree13a6b4165d3e2ba18e88e5103437f74e84e0838d /arch/arm/include
parentMerge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm (diff)
parentARM: at91: fix a typo (diff)
downloadlinux-dev-9f800363bb0ea459e15bef0928a72c88d374e489.tar.xz
linux-dev-9f800363bb0ea459e15bef0928a72c88d374e489.zip
Merge tag 'fixes-non-critical-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-critical bug fixes from Arnd Bergmann: "Lots of isolated bug fixes that were not found to be important enough to be submitted before the merge window or backported into stable kernels. The vast majority of these came out of Arnd's randconfig testing and just prevents running into build-time bugs in configurations that we do not care about in practice" * tag 'fixes-non-critical-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (75 commits) ARM: at91: fix a typo ARM: moxart: fix CPU selection ARM: tegra: fix board DT pinmux setup ARM: nspire: Fix compiler warning IXP4xx: Fix DMA masks. Revert "ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation" IXP4xx: Fix Goramo Multilink GPIO conversion. Revert "ARM: ixp4xx: fix gpio rework" ARM: tegra: make debug_ll code build for ARMv6 ARM: sunxi: fix build for THUMB2_KERNEL ARM: exynos: add missing include of linux/module.h ARM: exynos: fix l2x0 saved regs handling ARM: samsung: select CRC32 for SAMSUNG_PM_CHECK ARM: samsung: select ATAGS where necessary ARM: samsung: fix SAMSUNG_PM_DEBUG Kconfig logic ARM: samsung: allow serial driver to be disabled ARM: s5pv210: enable IDE support in MACH_TORBRECK ARM: s5p64x0: fix building with only one soc type ARM: s3c64xx: select power domains only when used ARM: s3c64xx: MACH_SMDK6400 needs HSMMC1 ...
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/smp.h1
-rw-r--r--arch/arm/include/debug/tegra.S18
2 files changed, 9 insertions, 10 deletions
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index 22a3b9b5d4a1..4157aec4e307 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -74,6 +74,7 @@ struct secondary_data {
};
extern struct secondary_data secondary_data;
extern volatile int pen_release;
+extern void secondary_startup(void);
extern int __cpu_disable(void);
diff --git a/arch/arm/include/debug/tegra.S b/arch/arm/include/debug/tegra.S
index f98763f0bc17..3bc80599c022 100644
--- a/arch/arm/include/debug/tegra.S
+++ b/arch/arm/include/debug/tegra.S
@@ -53,8 +53,7 @@
#define checkuart(rp, rv, lhu, bit, uart) \
/* Load address of CLK_RST register */ \
- movw rp, #TEGRA_CLK_RST_DEVICES_##lhu & 0xffff ; \
- movt rp, #TEGRA_CLK_RST_DEVICES_##lhu >> 16 ; \
+ ldr rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \
/* Load value from CLK_RST register */ \
ldr rp, [rp, #0] ; \
/* Test UART's reset bit */ \
@@ -62,8 +61,7 @@
/* If set, can't use UART; jump to save no UART */ \
bne 90f ; \
/* Load address of CLK_OUT_ENB register */ \
- movw rp, #TEGRA_CLK_OUT_ENB_##lhu & 0xffff ; \
- movt rp, #TEGRA_CLK_OUT_ENB_##lhu >> 16 ; \
+ ldr rp, =TEGRA_CLK_OUT_ENB_##lhu ; \
/* Load value from CLK_OUT_ENB register */ \
ldr rp, [rp, #0] ; \
/* Test UART's clock enable bit */ \
@@ -71,8 +69,7 @@
/* If clear, can't use UART; jump to save no UART */ \
beq 90f ; \
/* Passed all tests, load address of UART registers */ \
- movw rp, #TEGRA_UART##uart##_BASE & 0xffff ; \
- movt rp, #TEGRA_UART##uart##_BASE >> 16 ; \
+ ldr rp, =TEGRA_UART##uart##_BASE ; \
/* Jump to save UART address */ \
b 91f
@@ -90,15 +87,16 @@
#ifdef CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA
/* Check ODMDATA */
-10: movw \rp, #TEGRA_PMC_SCRATCH20 & 0xffff
- movt \rp, #TEGRA_PMC_SCRATCH20 >> 16
+10: ldr \rp, =TEGRA_PMC_SCRATCH20
ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
- ubfx \rv, \rp, #18, #2 @ 19:18 are console type
+ lsr \rv, \rp, #18 @ 19:18 are console type
+ and \rv, \rv, #3
cmp \rv, #2 @ 2 and 3 mean DCC, UART
beq 11f @ some boards swap the meaning
cmp \rv, #3 @ so accept either
bne 90f
-11: ubfx \rv, \rp, #15, #3 @ 17:15 are UART ID
+11: lsr \rv, \rp, #15 @ 17:15 are UART ID
+ and \rv, #7
cmp \rv, #0 @ UART 0?
beq 20f
cmp \rv, #1 @ UART 1?