aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/include
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2016-02-26 22:54:53 +0100
committerArnd Bergmann <arnd@arndb.de>2016-02-26 22:54:53 +0100
commite7ada8dfd564d9fa518432a513994cc53e358fad (patch)
treed287940ed960d538f76f51432f53da7e4b9dc36f /arch/arm/include
parentMerge tag 'davinci-for-v4.6/edma' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc (diff)
parentARM: zynq: Move early printk virtual address to vmalloc area (diff)
downloadlinux-dev-e7ada8dfd564d9fa518432a513994cc53e358fad.tar.xz
linux-dev-e7ada8dfd564d9fa518432a513994cc53e358fad.zip
Merge tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx into next/soc
Merge "ARM: Xilinx Zynq patches for v4.6" from Michal Simek: - SLCR early init - Fix L2 cache data corruption - Fix early printk uart setting * tag 'zynq-soc-for-4.6' of https://github.com/Xilinx/linux-xlnx: ARM: zynq: Move early printk virtual address to vmalloc area ARM: zynq: address L2 cache data corruption ARM: zynq: initialize slcr mapping earlier
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/debug/zynq.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/debug/zynq.S b/arch/arm/include/debug/zynq.S
index de86b9247564..060cb5b49bfd 100644
--- a/arch/arm/include/debug/zynq.S
+++ b/arch/arm/include/debug/zynq.S
@@ -20,9 +20,9 @@
#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */
#define UART0_PHYS 0xE0000000
-#define UART0_VIRT 0xF0000000
+#define UART0_VIRT 0xF0800000
#define UART1_PHYS 0xE0001000
-#define UART1_VIRT 0xF0001000
+#define UART1_VIRT 0xF0801000
#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
# define LL_UART_PADDR UART1_PHYS