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authorCyril Chemparathy <cyril@ti.com>2010-03-25 17:43:46 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-06 15:02:04 -0700
commit449ef7f6a9c732657938b222f8804d3e34a3603e (patch)
treee51b0deae656c28dc77215c1ccd4466202ed98ab /arch/arm/mach-davinci/cp_intc.c
parentDavinci: enable timer clock before use (diff)
downloadlinux-dev-449ef7f6a9c732657938b222f8804d3e34a3603e.tar.xz
linux-dev-449ef7f6a9c732657938b222f8804d3e34a3603e.zip
Davinci: cpintc host map configuration
Host map configuration instructs the interrupt controller to route interrupt channels to FIQ or IRQ lines. Currently, DA8xx family of devices leave these registers at their reset-default values. TNETV107X however does not have sane reset defaults, and therefore this architecture needs to reconfigure the host-map such that channels 0 and 1 go to FIQ, and the remaining channels raise IRQs. This patch adds an optional host map argument to cp_intc_init() for this. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/cp_intc.c')
-rw-r--r--arch/arm/mach-davinci/cp_intc.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index 37311d1830eb..2a8d26ee4bbf 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -101,7 +101,7 @@ static struct irq_chip cp_intc_irq_chip = {
};
void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
- u8 *irq_prio)
+ u8 *irq_prio, u32 *host_map)
{
unsigned num_reg = BITS_TO_LONGS(num_irq);
int i;
@@ -157,6 +157,10 @@ void __init cp_intc_init(void __iomem *base, unsigned short num_irq,
cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
}
+ if (host_map)
+ for (i = 0; host_map[i] != -1; i++)
+ cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
+
/* Set up genirq dispatching for cp_intc */
for (i = 0; i < num_irq; i++) {
set_irq_chip(i, &cp_intc_irq_chip);