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| author |   Sandeep Paulraj <s-paulraj@ti.com> | 2010-02-01 09:51:31 -0500 |
|---|---|---|
| committer |   Kevin Hilman <khilman@deeprootsystems.com> | 2010-03-01 10:20:24 -0800 |
| commit | a3e13e89d6658042fdfd50a7bf7564e81e6ce689 (patch) | |
| tree | 45f8cdeae69f740e7f34cc6a760416c895b07d29 /arch/arm/mach-davinci/dm365.c | |
| parent | DaVinci DM355: Modifications to DM355 SPI support (diff) | |
| download | linux-dev-a3e13e89d6658042fdfd50a7bf7564e81e6ce689.tar.xz linux-dev-a3e13e89d6658042fdfd50a7bf7564e81e6ce689.zip | |
DaVinci DM365: Adding DM365 SPI support
This patch adds SPI init for DM365.
It does the following
1) Initializes SPI0
2) Defines resources to be used by SPI0
3) Adds platform data for SPI0
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/dm365.c')
| -rw-r--r-- | arch/arm/mach-davinci/dm365.c | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index e88f2624df68..27772e18e45b 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -18,6 +18,7 @@ #include <linux/platform_device.h> #include <linux/dma-mapping.h> #include <linux/gpio.h> +#include <linux/spi/spi.h> #include <asm/mach/map.h> @@ -32,6 +33,8 @@ #include <mach/common.h> #include <mach/asp.h> #include <mach/keyscan.h> +#include <mach/spi.h> + #include "clock.h" #include "mux.h" @@ -611,6 +614,73 @@ EVT_CFG(DM365, EVT3_VC_RX, 1, 1, 1, false) #endif }; +static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); + +static struct davinci_spi_platform_data dm365_spi0_pdata = { + .version = SPI_VERSION_1, + .num_chipselect = 2, + .clk_internal = 1, + .cs_hold = 1, + .intr_level = 0, + .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ + .c2tdelay = 0, + .t2cdelay = 0, +}; + +static struct resource dm365_spi0_resources[] = { + { + .start = 0x01c66000, + .end = 0x01c667ff, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DM365_SPIINT0_0, + .flags = IORESOURCE_IRQ, + }, + { + .start = 17, + .flags = IORESOURCE_DMA, + }, + { + .start = 16, + .flags = IORESOURCE_DMA, + }, + { + .start = EVENTQ_3, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device dm365_spi0_device = { + .name = "spi_davinci", + .id = 0, + .dev = { + .dma_mask = &dm365_spi0_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &dm365_spi0_pdata, + }, + .num_resources = ARRAY_SIZE(dm365_spi0_resources), + .resource = dm365_spi0_resources, +}; + +void __init dm365_init_spi0(unsigned chipselect_mask, + struct spi_board_info *info, unsigned len) +{ + davinci_cfg_reg(DM365_SPI0_SCLK); + davinci_cfg_reg(DM365_SPI0_SDI); + davinci_cfg_reg(DM365_SPI0_SDO); + + /* not all slaves will be wired up */ + if (chipselect_mask & BIT(0)) + davinci_cfg_reg(DM365_SPI0_SDENA0); + if (chipselect_mask & BIT(1)) + davinci_cfg_reg(DM365_SPI0_SDENA1); + + spi_register_board_info(info, len); + + platform_device_register(&dm365_spi0_device); +} + static struct emac_platform_data dm365_emac_pdata = { .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, |