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| author |   Murali Karicheri <m-karicheri2@ti.com> | 2011-11-15 01:42:07 +0530 |
|---|---|---|
| committer |   Sekhar Nori <nsekhar@ti.com> | 2011-12-05 16:47:15 +0530 |
| commit | 78b838252fa986f66c7ec8047726ea500a08d98f (patch) | |
| tree | f1ac66b81c7de47c2299735ea6ddf4b0169b07e9 /arch/arm/mach-davinci/include | |
| parent | ARM: davinci: psc: fix incorrect mask (diff) | |
| download | linux-dev-78b838252fa986f66c7ec8047726ea500a08d98f.tar.xz linux-dev-78b838252fa986f66c7ec8047726ea500a08d98f.zip | |
ARM: davinci: psc: fix incorrect offsets
Seperate PDSTAT and PDCTL registers are defined for
domain 0 and domain 1 where as the code always reads
the domain 0 PDSTAT register and domain 1 PDCTL register.
Fix this issue. While at it, introduce usage of macros
for register masks to improve readability.
Reviewed-by: Sergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/include')
| -rw-r--r-- | arch/arm/mach-davinci/include/mach/psc.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 8bf279a88b4b..8bc3fc256171 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -233,7 +233,7 @@ #define PTCMD 0x120 #define PTSTAT 0x128 #define PDSTAT 0x200 -#define PDCTL1 0x304 +#define PDCTL 0x300 #define MDSTAT 0x800 #define MDCTL 0xA00 @@ -246,6 +246,8 @@ #define MDSTAT_STATE_MASK 0x3f #define PDSTAT_STATE_MASK 0x1f #define MDCTL_FORCE BIT(31) +#define PDCTL_NEXT BIT(1) +#define PDCTL_EPCGOOD BIT(8) #ifndef __ASSEMBLER__ |