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authorLinus Torvalds <torvalds@linux-foundation.org>2014-07-18 20:49:47 -1000
committerLinus Torvalds <torvalds@linux-foundation.org>2014-07-18 20:49:47 -1000
commitd614cb0bc3c991710a7bbb5496e990550cb08180 (patch)
tree6caf224acfca4d72e4109a30421bee77ef9f0155 /arch/arm/mach-exynos/hotplug.c
parentMerge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (diff)
parentARM: EXYNOS: Fix core ID used by platsmp and hotplug code (diff)
downloadlinux-dev-d614cb0bc3c991710a7bbb5496e990550cb08180.tar.xz
linux-dev-d614cb0bc3c991710a7bbb5496e990550cb08180.zip
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "A smaller set of fixes this week, and all regression fixes: - a handful of issues fixed on at91 with common clock conversion - a set of fixes for Marvell mvebu (SMP, coherency, PM) - a clock fix for i.MX6Q. - ... and a SMP/hotplug fix for Exynos" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: EXYNOS: Fix core ID used by platsmp and hotplug code ARM: at91/dt: add missing clocks property to pwm node in sam9x5.dtsi ARM: at91/dt: fix usb0 clocks definition in sam9n12 dtsi ARM: at91: at91sam9x5: correct typo error for ohci clock ARM: clk-imx6q: parent lvds_sel input from upstream clock gates ARM: mvebu: Fix coherency bus notifiers by using separate notifiers ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian
Diffstat (limited to 'arch/arm/mach-exynos/hotplug.c')
-rw-r--r--arch/arm/mach-exynos/hotplug.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 8a134d019cb3..920a4baa53cd 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -40,15 +40,17 @@ static inline void cpu_leave_lowpower(void)
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
{
+ u32 mpidr = cpu_logical_map(cpu);
+ u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+
for (;;) {
- /* make cpu1 to be turned off at next WFI command */
- if (cpu == 1)
- exynos_cpu_power_down(cpu);
+ /* Turn the CPU off on next WFI instruction. */
+ exynos_cpu_power_down(core_id);
wfi();
- if (pen_release == cpu_logical_map(cpu)) {
+ if (pen_release == core_id) {
/*
* OK, proper wakeup, we're done
*/