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| author |   Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 13:54:56 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 13:54:56 +0900 |
| commit | 830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch) | |
| tree | e72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/mach-exynos/include/mach/memory.h | |
| parent | ARM: EXYNOS4: convert MCT to percpu interrupt API (diff) | |
| download | linux-dev-830145796a5c8f1ca3f87ea619063c1d99a57df5.tar.xz linux-dev-830145796a5c8f1ca3f87ea619063c1d99a57df5.zip | |
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has
made for plaforms based on EXYNOS4 SoCs. But since upcoming
Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most
codes in current mach-exynos4, one mach-exynos directory will
be used for them.
This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos)
but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to
avoid changing in driver side.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include/mach/memory.h')
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/memory.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h new file mode 100644 index 000000000000..374ef2cf7152 --- /dev/null +++ b/arch/arm/mach-exynos/include/mach/memory.h @@ -0,0 +1,22 @@ +/* linux/arch/arm/mach-exynos4/include/mach/memory.h + * + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * EXYNOS4 - Memory definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H __FILE__ + +#define PLAT_PHYS_OFFSET UL(0x40000000) + +/* Maximum of 256MiB in one bank */ +#define MAX_PHYSMEM_BITS 32 +#define SECTION_SIZE_BITS 28 + +#endif /* __ASM_ARCH_MEMORY_H */ |