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authorRob Herring <rob.herring@calxeda.com>2012-10-25 12:13:47 -0500
committerRob Herring <rob.herring@calxeda.com>2012-10-31 13:46:50 -0500
commit7a2848d369b2b9281400e6c9f08e21ec71cd1dcb (patch)
treeabb8983696264faee745f49a8132589134f0e791 /arch/arm/mach-highbank/platsmp.c
parentARM: smp_twd: don't warn on no DT node (diff)
downloadlinux-dev-7a2848d369b2b9281400e6c9f08e21ec71cd1dcb.tar.xz
linux-dev-7a2848d369b2b9281400e6c9f08e21ec71cd1dcb.zip
ARM: highbank: abstract out SCU usage
In preparation for A15 support on ECX-2000, the direct calls to SCU registers must be conditional. The SCU power mode register is replaced by a custom register on ECX-2000. Rather than read the number of cores from the SCU, just hardcode it to 4. This removes one use of SCU and removes the need for the SCU to be statically mapped. The cpu initialization will ultimately come from DT. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-highbank/platsmp.c')
-rw-r--r--arch/arm/mach-highbank/platsmp.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index fa9560ec6e70..1129957f6c1d 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -42,9 +42,7 @@ static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struc
*/
static void __init highbank_smp_init_cpus(void)
{
- unsigned int i, ncores;
-
- ncores = scu_get_core_count(scu_base_addr);
+ unsigned int i, ncores = 4;
/* sanity check */
if (ncores > NR_CPUS) {
@@ -65,7 +63,8 @@ static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
{
int i;
- scu_enable(scu_base_addr);
+ if (scu_base_addr)
+ scu_enable(scu_base_addr);
/*
* Write the address of secondary startup into the jump table