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authorFugang Duan <b38611@freescale.com>2015-07-28 15:30:40 +0800
committerShawn Guo <shawnguo@kernel.org>2015-08-05 20:52:11 +0800
commit709bc0657fe6f9f55fdaab246135ff73ba7796e4 (patch)
treed4f41b70d964b4dd6e45b36b2c0322783ddcb4a1 /arch/arm/mach-imx/mach-imx6ul.c
parentARM: imx6ul: add fec bits to GPR syscon definition (diff)
downloadlinux-dev-709bc0657fe6f9f55fdaab246135ff73ba7796e4.tar.xz
linux-dev-709bc0657fe6f9f55fdaab246135ff73ba7796e4.zip
ARM: imx6ul: add fec MAC refrence clock and phy fixup init
Add FEC MAC refrence clock init. Add phy fixup init for i.MX6ul 14x14 evk board that installs KSZ8081 phy. For the phy, there needs extra phy fixup for MII and RMII mode. Signed-off-by: Fugang Duan <b38611@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6ul.c')
-rw-r--r--arch/arm/mach-imx/mach-imx6ul.c43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index f206506c8876..db74da5b46af 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -6,12 +6,54 @@
* published by the Free Software Foundation.
*/
#include <linux/irqchip.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
+#include <linux/micrel_phy.h>
#include <linux/of_platform.h>
+#include <linux/phy.h>
+#include <linux/regmap.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "common.h"
+static void __init imx6ul_enet_clk_init(void)
+{
+ struct regmap *gpr;
+
+ gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
+ if (!IS_ERR(gpr))
+ regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
+ IMX6UL_GPR1_ENET_CLK_OUTPUT);
+ else
+ pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
+
+}
+
+static int ksz8081_phy_fixup(struct phy_device *dev)
+{
+ if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
+ phy_write(dev, 0x1f, 0x8110);
+ phy_write(dev, 0x16, 0x201);
+ } else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
+ phy_write(dev, 0x1f, 0x8190);
+ phy_write(dev, 0x16, 0x202);
+ }
+
+ return 0;
+}
+
+static void __init imx6ul_enet_phy_init(void)
+{
+ phy_register_fixup_for_uid(PHY_ID_KSZ8081, 0xffffffff, ksz8081_phy_fixup);
+}
+
+static inline void imx6ul_enet_init(void)
+{
+ imx6ul_enet_clk_init();
+ imx6ul_enet_phy_init();
+}
+
static void __init imx6ul_init_machine(void)
{
struct device *parent;
@@ -21,6 +63,7 @@ static void __init imx6ul_init_machine(void)
pr_warn("failed to initialize soc device\n");
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ imx6ul_enet_init();
imx_anatop_init();
}