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| author |   Alexander Shiyan <shc_work@mail.ru> | 2016-06-19 09:55:53 +0300 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2016-06-21 15:57:05 +0800 |
| commit | d1e1c31ccd5a807a707c94386d5fa36d18600892 (patch) | |
| tree | a60a9b3188157d495b235df3e356b52625c9b33f /arch/arm/mach-imx/tzic.c | |
| parent | ARM: imx6: fix static declaration in include/soc/imx/cpuidle.h (diff) | |
| download | linux-dev-d1e1c31ccd5a807a707c94386d5fa36d18600892.tar.xz linux-dev-d1e1c31ccd5a807a707c94386d5fa36d18600892.zip | |
ARM: i.MX: Fix FIQ interrupt handling for TZIC
IRQ number should be translated from VIRQ to HWIRQ for TZIC.
As a solution for this issue, move existing translation code
from AVIC to common place.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx/tzic.c')
| -rw-r--r-- | arch/arm/mach-imx/tzic.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c index ae23d50f7861..4399abd0f11f 100644 --- a/arch/arm/mach-imx/tzic.c +++ b/arch/arm/mach-imx/tzic.c @@ -56,14 +56,14 @@ static struct irq_domain *domain; #define TZIC_NUM_IRQS 128 #ifdef CONFIG_FIQ -static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) +static int tzic_set_irq_fiq(unsigned int hwirq, unsigned int type) { unsigned int index, mask, value; - index = irq >> 5; + index = hwirq >> 5; if (unlikely(index >= 4)) return -EINVAL; - mask = 1U << (irq & 0x1F); + mask = 1U << (hwirq & 0x1F); value = imx_readl(tzic_base + TZIC_INTSEC0(index)) | mask; if (type) |