diff options
| author |   Bai Ping <ping.bai@nxp.com> | 2016-02-02 18:01:38 +0800 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2016-02-14 11:07:17 +0800 |
| commit | c5a890a445d06b0dfe5fc954b7391c1ec0afb76d (patch) | |
| tree | fe517e75e576d8fb6b111b14f79bf9c115f127c9 /arch/arm/mach-imx | |
| parent | ARM: imx: enable big endian mode (diff) | |
| download | linux-dev-c5a890a445d06b0dfe5fc954b7391c1ec0afb76d.tar.xz linux-dev-c5a890a445d06b0dfe5fc954b7391c1ec0afb76d.zip | |
ARM: imx: Add msl code support for imx6qp
The i.MX6QP is a different SOC, but internally we treate it as i.MX6Q
Rev_2.0 to maximum the code reusability. The chip silicon number we
read from the ANADIG_DIGPROG is 0x630100. This patch add code to
identify it as i.MX6QP Rev_1.0 when print out the silicon version.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/anatop.c | 9 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mach-imx6q.c | 8 |
2 files changed, 14 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c index bd3555ee88c8..649a84c251ad 100644 --- a/arch/arm/mach-imx/anatop.c +++ b/arch/arm/mach-imx/anatop.c @@ -129,7 +129,14 @@ void __init imx_init_revision_from_anatop(void) switch (digprog & 0xff) { case 0: - revision = IMX_CHIP_REVISION_1_0; + /* + * For i.MX6QP, most of the code for i.MX6Q can be resued, + * so internally, we identify it as i.MX6Q Rev 2.0 + */ + if (digprog >> 8 & 0x01) + revision = IMX_CHIP_REVISION_2_0; + else + revision = IMX_CHIP_REVISION_1_0; break; case 1: revision = IMX_CHIP_REVISION_1_1; diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 3878494bd118..cb27d566d5ab 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -266,8 +266,11 @@ static void __init imx6q_init_machine(void) { struct device *parent; - imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q", - imx_get_soc_revision()); + if (cpu_is_imx6q() && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0) + imx_print_silicon_rev("i.MX6QP", IMX_CHIP_REVISION_1_0); + else + imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q", + imx_get_soc_revision()); parent = imx_soc_device_init(); if (parent == NULL) @@ -399,6 +402,7 @@ static void __init imx6q_init_irq(void) static const char * const imx6q_dt_compat[] __initconst = { "fsl,imx6dl", "fsl,imx6q", + "fsl,imx6qp", NULL, }; |