diff options
| author |   Linus Walleij <linus.walleij@linaro.org> | 2018-12-29 14:30:27 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-04-19 20:37:34 +0200 |
| commit | 98ac0cc270b717c49a49787fe7c42041123290bb (patch) | |
| tree | 555cfeaa75f141a9b2a9d84f4a4508cce97235d1 /arch/arm/mach-ixp4xx/include/mach/entry-macro.S | |
| parent | ARM: ixp4xx: Add myself as maintainer (diff) | |
| download | linux-dev-98ac0cc270b717c49a49787fe7c42041123290bb.tar.xz linux-dev-98ac0cc270b717c49a49787fe7c42041123290bb.zip | |
ARM: ixp4xx: Convert to MULTI_IRQ_HANDLER
This rewrites the IXP4xx to use MULTI_IRQ_HANDLER and
create an irqdomain for the irqchip in the platform. We
convert the timer to request the interrupt like any other
driver in the process.
We bump all IRQs to 16+offset to avoid using IRQ 0 and
set NR_IRQS to 512 (the default for most systems).
This conveniently fits with the first 16 IRQs being
pre-allocated when using SPARSE_IRQ.
This is a prerequisite for SPARSE_IRQ and DT boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ixp4xx/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/entry-macro.S | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S deleted file mode 100644 index 79adf83e2c3d..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * arch/arm/mach-ixp4xx/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for IXP4xx-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include <mach/hardware.h> - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) - ldr \irqstat, [\irqstat] @ get interrupts - cmp \irqstat, #0 - beq 1001f @ upper IRQ? - clz \irqnr, \irqstat - mov \base, #31 - sub \irqnr, \base, \irqnr - b 1002f @ lower IRQ being - @ handled - -1001: - /* - * IXP465/IXP435 has an upper IRQ status register - */ -#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) - ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) - ldr \irqstat, [\irqstat] @ get upper interrupts - mov \irqnr, #63 - clz \irqstat, \irqstat - cmp \irqstat, #32 - subne \irqnr, \irqnr, \irqstat -#endif -1002: - .endm - - |