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| author |   Arnd Bergmann <arnd@arndb.de> | 2012-07-17 22:41:50 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-07-17 22:41:50 +0200 |
| commit | 36c678f3c91ac92e9524abcf9b39f9f539d60279 (patch) | |
| tree | c9c0df006a7e9bcc14492b1d1fa6aa2c5c43d3a3 /arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | |
| parent | Merge tag 'omap-devel-am33xx-data-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/clk (diff) | |
| parent | ARM: imx: clk-imx31: Fix clock id for rnga driver (diff) | |
| download | linux-dev-36c678f3c91ac92e9524abcf9b39f9f539d60279.tar.xz linux-dev-36c678f3c91ac92e9524abcf9b39f9f539d60279.zip | |
Merge tag 'imx-clk' of git://git.pengutronix.de/git/imx/linux-2.6 into next/clk
From Sascha Hauer <s.hauer@pengutronix.de>:
i.MX clk noncritical fixes and updates
* tag 'imx-clk' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: imx: clk-imx31: Fix clock id for rnga driver
ARM: imx: add missing item to the list of clock event modes
ARM: i.MX5x CSPI: Fixed clock name for CSPI
ARM: i.MX5x clocks: Fix GPT clocks
ARM: i.MX5x clocks: Fix parent for PWM clocks
ARM: i.MX5x clocks: Add EPIT support
ARM: mx27: Reenable silicon version print
ARM: clk-imx27: Fix rtc clock id
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-mv78xx0/include/mach/mv78xx0.h')
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index 3674497162e3..e807c4c52a0b 100644 --- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -42,6 +42,7 @@ #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 #define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 +#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000 #define MV78XX0_CORE_REGS_SIZE SZ_16K #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) @@ -59,6 +60,7 @@ * Core-specific peripheral registers. */ #define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) +#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE) /* * Register Map |