aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/hdq1w.c
diff options
context:
space:
mode:
authorPaul Walmsley <paul@pwsan.com>2012-06-21 21:40:37 -0600
committerPaul Walmsley <paul@pwsan.com>2012-06-21 21:40:37 -0600
commit2acd089471d93373e051c6b1f9f9e0d9e51a76bc (patch)
tree047f85f2990046ba33c3c0227987d70ceab50abb /arch/arm/mach-omap2/hdq1w.c
parentW1: OMAP HDQ1W: allow driver to be built on all OMAP2+ (diff)
downloadlinux-dev-2acd089471d93373e051c6b1f9f9e0d9e51a76bc.tar.xz
linux-dev-2acd089471d93373e051c6b1f9f9e0d9e51a76bc.zip
W1: OMAP HDQ1W: use 32-bit register accesses
HDQ/1-wire registers are 32 bits long, even if the register contents fit into 8 bits, so accesses must be 32-bit aligned. Evidently the OMAP2/3 interconnects allowed the driver to get away with 8 bit accesses, but the OMAP4 puts a stop to that: [ 1.488800] Driver for 1-wire Dallas network protocol. [ 1.495025] Bad mode in data abort handler detected [ 1.500122] Internal error: Oops - bad mode: 0 [#1] SMP [ 1.505615] Modules linked in: [ 1.508819] CPU: 0 Not tainted (3.3.0-rc1-00008-g45030e9 #992) [ 1.515289] PC is at 0xffff0018 [ 1.518615] LR is at omap_hdq_probe+0xd4/0x2cc The OMAP4430 ES2 Rev X TRM does warn about this restriction in section 23.2.6.2 "HDQ/1-Wire Registers". Fixes the crash on OMAP4430 ES2 Pandaboard. Tested also on OMAP34xx and OMAP2420; it seems to work fine on those chips, although due to the lack of boards with HDQ/1-wire devices here, a more indepth test was not possible. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: NeilBrown <neilb@suse.de> Cc: Evgeniy Polyakov <zbr@ioremap.net> Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
Diffstat (limited to 'arch/arm/mach-omap2/hdq1w.c')
0 files changed, 0 insertions, 0 deletions