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authorMarc Zyngier <marc.zyngier@arm.com>2011-09-08 13:15:22 +0100
committerArnd Bergmann <arnd@arndb.de>2012-09-13 15:34:57 +0200
commit06915321e7935d2eb778f0a7f333b2603c1404df (patch)
treeedcab1162a19d1163c00134f2d2c163e71a566ba /arch/arm/mach-omap2/omap-smp.c
parentARM: SoC: convert VExpress/RealView to SMP operations (diff)
downloadlinux-dev-06915321e7935d2eb778f0a7f333b2603c1404df.tar.xz
linux-dev-06915321e7935d2eb778f0a7f333b2603c1404df.zip
ARM: SoC: convert OMAP4 to SMP operations
Convert OMAP4 to use struct smp_operations to provide its SMP and CPU hotplug operations. Tested on both Panda and IGEPv2 (MULTI_OMAP kernel) Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-omap2/omap-smp.c')
-rw-r--r--arch/arm/mach-omap2/omap-smp.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 9a35adf91232..046fa0d6969f 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -49,7 +49,7 @@ void __iomem *omap4_get_scu_base(void)
return scu_base;
}
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit omap4_secondary_init(unsigned int cpu)
{
/*
* Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
@@ -77,7 +77,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
static struct clockdomain *cpu1_clkdm;
static bool booted;
@@ -165,7 +165,7 @@ static void __init wakeup_secondary(void)
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init omap4_smp_init_cpus(void)
{
unsigned int i = 0, ncores = 1, cpu_id;
@@ -196,7 +196,7 @@ void __init smp_init_cpus(void)
set_smp_cross_call(gic_raise_softirq);
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
{
/*
@@ -207,3 +207,13 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
scu_enable(scu_base);
wakeup_secondary();
}
+
+struct smp_operations omap4_smp_ops __initdata = {
+ .smp_init_cpus = omap4_smp_init_cpus,
+ .smp_prepare_cpus = omap4_smp_prepare_cpus,
+ .smp_secondary_init = omap4_secondary_init,
+ .smp_boot_secondary = omap4_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_die = omap4_cpu_die,
+#endif
+};