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authorTony Lindgren <tony@atomide.com>2017-08-29 10:03:33 -0700
committerTony Lindgren <tony@atomide.com>2017-09-19 11:04:44 -0700
commit8823ddf25d34e32c8691b9244e9b8aa120f1cff6 (patch)
tree1c0683220979555d457e0efa37ed8764c560fca5 /arch/arm/mach-omap2/omap_hwmod.c
parentARM: OMAP2+: Fix MMC address space mismatch for am33xx and am43xx (diff)
downloadlinux-dev-8823ddf25d34e32c8691b9244e9b8aa120f1cff6.tar.xz
linux-dev-8823ddf25d34e32c8691b9244e9b8aa120f1cff6.zip
ARM: OMAP2+: Fix overwriting of clkctrl and modulemode values
We are currently overwiting the hwmod clkctrl registers if we configure a clock ctrl clock from device tree. While this does not expose any bugs except for kernel coders when debugging things, it should be fixed for correctness. It is now impossible to use the hwmod data for checking the clkctrl register values after booting for debugging or generating dts data from hwmod data. Let's fix the issue by adding a helper to detect if clkctrl clock is configured. Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c49
1 files changed, 41 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 2dbd63239c54..d50101d44795 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -994,6 +994,34 @@ static int _enable_clocks(struct omap_hwmod *oh)
}
/**
+ * _omap4_clkctrl_managed_by_clkfwk - true if clkctrl managed by clock framework
+ * @oh: struct omap_hwmod *
+ */
+static bool _omap4_clkctrl_managed_by_clkfwk(struct omap_hwmod *oh)
+{
+ if (oh->prcm.omap4.flags & HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK)
+ return true;
+
+ return false;
+}
+
+/**
+ * _omap4_has_clkctrl_clock - returns true if a module has clkctrl clock
+ * @oh: struct omap_hwmod *
+ */
+static bool _omap4_has_clkctrl_clock(struct omap_hwmod *oh)
+{
+ if (oh->prcm.omap4.clkctrl_offs)
+ return true;
+
+ if (!oh->prcm.omap4.clkctrl_offs &&
+ oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET)
+ return true;
+
+ return false;
+}
+
+/**
* _disable_clocks - disable hwmod main clock and interface clocks
* @oh: struct omap_hwmod *
*
@@ -1030,7 +1058,8 @@ static int _disable_clocks(struct omap_hwmod *oh)
*/
static void _omap4_enable_module(struct omap_hwmod *oh)
{
- if (!oh->clkdm || !oh->prcm.omap4.modulemode)
+ if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
+ _omap4_clkctrl_managed_by_clkfwk(oh))
return;
pr_debug("omap_hwmod: %s: %s: %d\n",
@@ -1061,8 +1090,10 @@ static int _omap4_wait_target_disable(struct omap_hwmod *oh)
if (oh->flags & HWMOD_NO_IDLEST)
return 0;
- if (!oh->prcm.omap4.clkctrl_offs &&
- !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
+ if (_omap4_clkctrl_managed_by_clkfwk(oh))
+ return 0;
+
+ if (!_omap4_has_clkctrl_clock(oh))
return 0;
return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
@@ -1847,7 +1878,8 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
{
int v;
- if (!oh->clkdm || !oh->prcm.omap4.modulemode)
+ if (!oh->clkdm || !oh->prcm.omap4.modulemode ||
+ _omap4_clkctrl_managed_by_clkfwk(oh))
return -EINVAL;
/*
@@ -2829,8 +2861,10 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
if (!_find_mpu_rt_port(oh))
return 0;
- if (!oh->prcm.omap4.clkctrl_offs &&
- !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
+ if (_omap4_clkctrl_managed_by_clkfwk(oh))
+ return 0;
+
+ if (!_omap4_has_clkctrl_clock(oh))
return 0;
/* XXX check module SIDLEMODE, hardreset status */
@@ -2986,8 +3020,7 @@ static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
if (!oh)
return -EINVAL;
- oh->prcm.omap4.clkctrl_offs = 0;
- oh->prcm.omap4.modulemode = 0;
+ oh->prcm.omap4.flags |= HWMOD_OMAP4_CLKFWK_CLKCTR_CLOCK;
return 0;
}