diff options
| author |   Lennert Buytenhek <buytenh@wantstofly.org> | 2008-10-20 01:51:03 +0200 |
|---|---|---|
| committer |   Nicolas Pitre <nico@cam.org> | 2008-12-20 12:21:02 -0500 |
| commit | 9569dae75f6f6987e79fa26cf6da3fc24006c996 (patch) | |
| tree | b5982f41aea6ccee37af54fc8f7750aaff7e0bff /arch/arm/mach-orion5x/include/mach/orion5x.h | |
| parent | [ARM] s3c: define __io using the typesafe version (diff) | |
| download | linux-dev-9569dae75f6f6987e79fa26cf6da3fc24006c996.tar.xz linux-dev-9569dae75f6f6987e79fa26cf6da3fc24006c996.zip | |
[ARM] Orion: share GPIO handling code
Split off Orion GPIO handling code into plat-orion/, and add
support for multiple sets of (32) GPIO pins.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion5x/include/mach/orion5x.h')
| -rw-r--r-- | arch/arm/mach-orion5x/include/mach/orion5x.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 9f5ce1ce5840..a8915081773b 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h @@ -134,11 +134,6 @@ #define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050) #define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008) #define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010) -#define GPIO_OUT ORION5X_DEV_BUS_REG(0x100) -#define GPIO_IO_CONF ORION5X_DEV_BUS_REG(0x104) -#define GPIO_BLINK_EN ORION5X_DEV_BUS_REG(0x108) -#define GPIO_IN_POL ORION5X_DEV_BUS_REG(0x10c) -#define GPIO_DATA_IN ORION5X_DEV_BUS_REG(0x110) #define GPIO_EDGE_CAUSE ORION5X_DEV_BUS_REG(0x114) #define GPIO_EDGE_MASK ORION5X_DEV_BUS_REG(0x118) #define GPIO_LEVEL_MASK ORION5X_DEV_BUS_REG(0x11c) @@ -149,7 +144,6 @@ #define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0) #define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) #define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) -#define GPIO_MAX 32 /*************************************************************************** * Orion CPU Bridge Registers |