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| author |   Russell King <rmk+kernel@arm.linux.org.uk> | 2014-03-19 14:53:54 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-05-30 00:49:57 +0100 |
| commit | 39b53458cc635f103365ef09e9db6980fa01e3fb (patch) | |
| tree | b1a95af72dd28f79e1b16c94fe624c0b2217c8e9 /arch/arm/mach-realview/realview_pb1176.c | |
| parent | ARM: l2c: prima2: convert to generic l2c OF initialisation (diff) | |
| download | linux-dev-39b53458cc635f103365ef09e9db6980fa01e3fb.tar.xz linux-dev-39b53458cc635f103365ef09e9db6980fa01e3fb.zip | |
ARM: l2c: realview: improve commentry about the L2 cache requirements
Add better commentry about the L2 cache requirements on these platforms.
Unfortunately, the auxiliary control register is not pre-set to indicate
the correct cache parameters, so we have to manually program these.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview/realview_pb1176.c')
| -rw-r--r-- | arch/arm/mach-realview/realview_pb1176.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index c5eade76461b..e3bddb5ab10f 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -355,7 +355,13 @@ static void __init realview_pb1176_init(void) int i; #ifdef CONFIG_CACHE_L2X0 - /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */ + /* + * The PL220 needs to be manually configured as the hardware + * doesn't report the correct sizes. + * 128kB (16kB/way), 8-way associativity, event monitor and + * parity enabled, ignore share bit, no force write allocate + * Bits: .... ...0 0111 0011 0000 .... .... .... + */ l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff); #endif |