aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c/regs-dsc-s3c24xx.h
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2019-09-02 17:47:55 +0200
committerKrzysztof Kozlowski <krzk@kernel.org>2020-08-20 21:00:15 +0200
commit71b9114d2c13a648fbe6523dd859e611c316ad90 (patch)
treec380a723099f776736779319be913f8c0900989e /arch/arm/mach-s3c/regs-dsc-s3c24xx.h
parentARM: s3c24xx: stop including mach/hardware.h from mach/io.h (diff)
downloadlinux-dev-71b9114d2c13a648fbe6523dd859e611c316ad90.tar.xz
linux-dev-71b9114d2c13a648fbe6523dd859e611c316ad90.zip
ARM: s3c: move into a common directory
s3c24xx and s3c64xx have a lot in common, but are split across three separate directories, which makes the interaction of the header files more complicated than necessary. Move all three directories into a new mach-s3c, with a minimal set of changes to each file. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [krzk: Rebase, add s3c24xx and s3c64xx suffix to several files, add SPDX headers to new files, remove plat-samsung from MAINTAINERS] Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> https://lore.kernel.org/r/20200806182059.2431-39-krzk@kernel.org
Diffstat (limited to 'arch/arm/mach-s3c/regs-dsc-s3c24xx.h')
-rw-r--r--arch/arm/mach-s3c/regs-dsc-s3c24xx.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c/regs-dsc-s3c24xx.h b/arch/arm/mach-s3c/regs-dsc-s3c24xx.h
new file mode 100644
index 000000000000..8b8b572aef04
--- /dev/null
+++ b/arch/arm/mach-s3c/regs-dsc-s3c24xx.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
+ * http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * S3C2440/S3C2412 Signal Drive Strength Control
+ */
+
+
+#ifndef __ASM_ARCH_REGS_DSC_S3C24XX_H
+#define __ASM_ARCH_REGS_DSC_S3C24XX_H __FILE__
+
+/* S3C2412 */
+#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc)
+#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0)
+
+/* S3C2440 */
+#define S3C2440_DSC0 S3C2410_GPIOREG(0xc4)
+#define S3C2440_DSC1 S3C2410_GPIOREG(0xc8)
+
+#endif /* __ASM_ARCH_REGS_DSC_S3C24XX_H */
+