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| author |   Arnd Bergmann <arnd@arndb.de> | 2019-09-02 17:47:55 +0200 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-08-20 21:00:15 +0200 |
| commit | 71b9114d2c13a648fbe6523dd859e611c316ad90 (patch) | |
| tree | c380a723099f776736779319be913f8c0900989e /arch/arm/mach-s3c/sleep-s3c2412.S | |
| parent | ARM: s3c24xx: stop including mach/hardware.h from mach/io.h (diff) | |
| download | linux-dev-71b9114d2c13a648fbe6523dd859e611c316ad90.tar.xz linux-dev-71b9114d2c13a648fbe6523dd859e611c316ad90.zip | |
ARM: s3c: move into a common directory
s3c24xx and s3c64xx have a lot in common, but are split across three
separate directories, which makes the interaction of the header files
more complicated than necessary.
Move all three directories into a new mach-s3c, with a minimal
set of changes to each file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[krzk: Rebase, add s3c24xx and s3c64xx suffix to several files, add SPDX
headers to new files, remove plat-samsung from MAINTAINERS]
Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
https://lore.kernel.org/r/20200806182059.2431-39-krzk@kernel.org
Diffstat (limited to 'arch/arm/mach-s3c/sleep-s3c2412.S')
| -rw-r--r-- | arch/arm/mach-s3c/sleep-s3c2412.S | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c/sleep-s3c2412.S b/arch/arm/mach-s3c/sleep-s3c2412.S new file mode 100644 index 000000000000..434f5082b2ed --- /dev/null +++ b/arch/arm/mach-s3c/sleep-s3c2412.S @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2007 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2412 Power Manager low-level sleep support + */ + +#include <linux/linkage.h> +#include <asm/assembler.h> +#include <mach/map.h> + +#include <mach/regs-irq.h> + + .text + + .global s3c2412_sleep_enter + +s3c2412_sleep_enter: + mov r0, #0 /* argument for coprocessors */ + ldr r1, =S3C2410_INTPND + ldr r2, =S3C2410_SRCPND + ldr r3, =S3C2410_EINTPEND + + teq r0, r0 + bl s3c2412_sleep_enter1 + teq pc, r0 + bl s3c2412_sleep_enter1 + + .align 5 + + /* this is called twice, first with the Z flag to ensure that the + * instructions have been loaded into the cache, and the second + * time to try and suspend the system. + */ +s3c2412_sleep_enter1: + mcr p15, 0, r0, c7, c10, 4 + mcrne p15, 0, r0, c7, c0, 4 + + /* if we return from here, it is because an interrupt was + * active when we tried to shutdown. Try and ack the IRQ and + * retry, as simply returning causes the system to lock. + */ + + ldrne r9, [r1] + strne r9, [r1] + ldrne r9, [r2] + strne r9, [r2] + ldrne r9, [r3] + strne r9, [r3] + bne s3c2412_sleep_enter1 + + ret lr |