aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c64xx
diff options
context:
space:
mode:
authorBen Dooks <ben-linux@fluff.org>2010-05-27 14:57:27 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-10-23 11:49:02 +0900
commitf5321760ce1d65fd69facc982b8523b19edf07a0 (patch)
treed605203837ac0ebb2af8a8f7165fa70d05c3b821 /arch/arm/mach-s3c64xx
parentARM: SAMSUNG: Add GPIO configuration for a range of pins (diff)
downloadlinux-dev-f5321760ce1d65fd69facc982b8523b19edf07a0.tar.xz
linux-dev-f5321760ce1d65fd69facc982b8523b19edf07a0.zip
ARM: S3C64XX: Change dev-audio.c to use S3C_GPIO_SFN() for special functions
To aide in changing the gpio code, remove the use of pin-specific configs and move to using the S3C_GPIO_SFN() versions. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r--arch/arm/mach-s3c64xx/dev-audio.c79
1 files changed, 37 insertions, 42 deletions
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
index 9648fbc36eec..c9a44969e648 100644
--- a/arch/arm/mach-s3c64xx/dev-audio.c
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -22,27 +22,22 @@
#include <plat/audio.h>
#include <plat/gpio-cfg.h>
-#include <mach/gpio-bank-c.h>
-#include <mach/gpio-bank-d.h>
-#include <mach/gpio-bank-e.h>
-#include <mach/gpio-bank-h.h>
-
static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
{
switch (pdev->id) {
case 0:
- s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
- s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
- s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
- s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
- s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
+ s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3));
break;
case 1:
- s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
- s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
- s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
- s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
- s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
+ s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3));
+ s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3));
default:
printk(KERN_DEBUG "Invalid I2S Controller number!");
return -EINVAL;
@@ -53,13 +48,13 @@ static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
{
- s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
- s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
- s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
- s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
- s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
- s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
- s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
+ s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4));
return 0;
}
@@ -170,18 +165,18 @@ static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
{
switch (pdev->id) {
case 0:
- s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
- s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
- s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
- s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
- s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
+ s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2));
break;
case 1:
- s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
- s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
- s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
- s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
- s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
+ s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2));
break;
default:
printk(KERN_DEBUG "Invalid PCM Controller number!");
@@ -261,22 +256,22 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1);
static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
{
- s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK);
- s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
- s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
- s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
- s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);
+ s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4));
return 0;
}
static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
{
- s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK);
- s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
- s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
- s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
- s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);
+ s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4));
+ s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4));
return 0;
}