diff options
| author |   Magnus Damm <damm@opensource.se> | 2013-06-28 20:27:23 +0900 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2013-07-17 14:26:53 +0900 |
| commit | a7b99f27a260a25f856ea37090cea997d50fe112 (patch) | |
| tree | 9e8cbf093bb93b8ae1d4aecd8ef235e70e8c03ad /arch/arm/mach-shmobile/clock-r8a73a4.c | |
| parent | ARM: shmobile: Make r8a7790 Arch timer optional (diff) | |
| download | linux-dev-a7b99f27a260a25f856ea37090cea997d50fe112.tar.xz linux-dev-a7b99f27a260a25f856ea37090cea997d50fe112.zip | |
ARM: shmobile: Add r8a73a4 CMT10 clock event
Add clock event support for CMT1 timer channel 0
to the r8a73a4 SoC code. The CMT is used together
with a 32KHz clock in this case.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a73a4.c')
| -rw-r--r-- | arch/arm/mach-shmobile/clock-r8a73a4.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c index f831b3bbbb07..8ea5ef6c79cc 100644 --- a/arch/arm/mach-shmobile/clock-r8a73a4.c +++ b/arch/arm/mach-shmobile/clock-r8a73a4.c @@ -505,7 +505,7 @@ static struct clk div6_clks[DIV6_NR] = { /* MSTP */ enum { MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, - MSTP323, MSTP318, MSTP317, MSTP316, + MSTP329, MSTP323, MSTP318, MSTP317, MSTP316, MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300, MSTP411, MSTP410, MSTP409, MSTP522, MSTP515, @@ -529,6 +529,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 17, 0), /* IIC7 */ [MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* IIC0 */ [MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ + [MSTP329] = SH_CLK_MSTP32(&extalr_clk, SMSTPCR3, 29, 0), /* CMT10 */ [MSTP409] = SH_CLK_MSTP32(&main_div2_clk, SMSTPCR4, 9, 0), /* IIC5 */ [MSTP410] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */ [MSTP411] = SH_CLK_MSTP32(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */ @@ -593,6 +594,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]), CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]), CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]), + CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]), CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]), CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]), |