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authorStephen Warren <swarren@nvidia.com>2012-04-12 15:03:52 -0600
committerStephen Warren <swarren@nvidia.com>2012-04-25 15:22:09 -0600
commit60d148b9f838b718e4808061ee6d5833de77fd9c (patch)
treeeb0845d18a171176e605759ebaf52ae97c1c88b9 /arch/arm/mach-tegra/board-paz00.c
parentARM: tegra: change pll_p_out4's rate to 24MHz (diff)
downloadlinux-dev-60d148b9f838b718e4808061ee6d5833de77fd9c.tar.xz
linux-dev-60d148b9f838b718e4808061ee6d5833de77fd9c.zip
ARM: tegra: don't hard-code USB ULPI PHY reset_gpio
Not all boards use GPIO_PV0 as the ULPI PHY reset signal. Instead of hard-coding this GPIO into devices.c, make the board files set it explicitly. This will allow the PHY code to differentiate between set and unset values, and hence know when to read the value from device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-paz00.c')
-rw-r--r--arch/arm/mach-tegra/board-paz00.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index aebfa4003813..e31317deec21 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -159,6 +159,8 @@ static void paz00_i2c_init(void)
static void paz00_usb_init(void)
{
+ tegra_ehci2_ulpi_phy_config.reset_gpio = TEGRA_ULPI_RST;
+
platform_device_register(&tegra_ehci2_device);
platform_device_register(&tegra_ehci3_device);
}