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authorJoseph Lo <josephl@nvidia.com>2013-01-03 14:42:59 +0800
committerStephen Warren <swarren@nvidia.com>2013-01-28 10:21:44 -0700
commit57886616ca7bff844a6427436d0c8faf74653f73 (patch)
tree4c353be72a7f266727320189e8e91965b93fa0b0 /arch/arm/mach-tegra/hotplug.c
parentARM: tegra30: fix power up sequence for boot_secondary (diff)
downloadlinux-dev-57886616ca7bff844a6427436d0c8faf74653f73.tar.xz
linux-dev-57886616ca7bff844a6427436d0c8faf74653f73.zip
ARM: tegra: update the cache maintenance order for CPU shutdown
Updating the cache maintenance order before CPU shutdown when doing CPU hotplug. The old order: * clean L1 by flush_cache_all * exit SMP * CPU shutdown Adapt to: * disable L1 data cache by clear C bit * clean L1 by v7_flush_dcache_louis * exit SMP * CPU shutdown For CPU hotplug case, it's no need to do "flush_cache_all". And we should disable L1 data cache before clean L1 data cache. Then leaving the SMP coherency. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/hotplug.c')
-rw-r--r--arch/arm/mach-tegra/hotplug.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c
index dca5141a2c31..d8c683b875d1 100644
--- a/arch/arm/mach-tegra/hotplug.c
+++ b/arch/arm/mach-tegra/hotplug.c
@@ -28,8 +28,8 @@ void __ref tegra_cpu_die(unsigned int cpu)
{
cpu = cpu_logical_map(cpu);
- /* Flush the L1 data cache. */
- flush_cache_all();
+ /* Clean L1 data cache */
+ tegra_disable_clean_inv_dcache();
/* Shut down the current CPU. */
tegra_hotplug_shutdown();