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author | Olof Johansson <olof@lixom.net> | 2013-02-05 12:13:10 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2013-02-05 12:13:10 -0800 |
commit | bda6f8e6cdcdb55db9b2961b6a7c9d0d97da4765 (patch) | |
tree | cec7c71c5120538352157fa1d2826efe881a7b0c /arch/arm/mach-tegra/include/mach/clk.h | |
parent | Merge tag 'renesas-soc3-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc (diff) | |
parent | clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s (diff) | |
download | linux-dev-bda6f8e6cdcdb55db9b2961b6a7c9d0d97da4765.tar.xz linux-dev-bda6f8e6cdcdb55db9b2961b6a7c9d0d97da4765.zip |
Merge tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc
From Stephen Warren:
ARM: tegra: Common Clock Framework rework
Tegra already supports the common clock framework, but had issues:
1) The clock driver was located in arch/arm/mach-tegra/ rather than
drivers/clk/.
2) A single "Tegra clock" type was implemented, rather than separate
clock types for PLL, mux, divider, ... type in HW.
3) Clock lookups by device drivers were still driven by device name
and connection ID, rather than through device tree.
This pull request solves all three issues. This required some DT changes
to add clocks properties, and driver changes to request clocks more
"correctly". Finally, this rework allows all AUXDATA to be removed from
Tegra board files, and various duplicate clock lookup entries to be
removed from the driver.
This pull request is based on the previous pull request, with tag
tegra-for-3.9-cleanup.
* tag 'tegra-for-3.9-soc-ccf' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (31 commits)
clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()s
clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()s
ARM: tegra30: remove auxdata
ARM: tegra20: remove auxdata
ASoC: tegra: remove auxdata
staging: nvec: remove use of clk_get_sys
ARM: tegra: paz00: add clock information to DT
ARM: tegra: add clock properties to Tegra30 DT
ARM: tegra: add clock properties to Tegra20 DT
spi: tegra: do not use clock name to get clock
ARM: tegra: remove legacy clock code
ARM: tegra: migrate to new clock code
clk: tegra: add clock support for Tegra30
clk: tegra: add clock support for Tegra20
clk: tegra: add Tegra specific clocks
ARM: tegra: define Tegra30 CAR binding
ARM: tegra: define Tegra20 CAR binding
ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.h
ARM: tegra: add function to read chipid
ARM: tegra: fix compile error when disable CPU_IDLE
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/board-dt-tegra30.c
arch/arm/mach-tegra/common.c
arch/arm/mach-tegra/platsmp.c
drivers/clocksource/Makefile
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/clk.h')
-rw-r--r-- | arch/arm/mach-tegra/include/mach/clk.h | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h deleted file mode 100644 index 95f3a547c770..000000000000 --- a/arch/arm/mach-tegra/include/mach/clk.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/clk.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Erik Gilling <konkers@google.com> - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_CLK_H -#define __MACH_CLK_H - -struct clk; - -enum tegra_clk_ex_param { - TEGRA_CLK_VI_INP_SEL, - TEGRA_CLK_DTV_INVERT, - TEGRA_CLK_NAND_PAD_DIV2_ENB, - TEGRA_CLK_PLLD_CSI_OUT_ENB, - TEGRA_CLK_PLLD_DSI_OUT_ENB, - TEGRA_CLK_PLLD_MIPI_MUX_SEL, -}; - -void tegra_periph_reset_deassert(struct clk *c); -void tegra_periph_reset_assert(struct clk *c); - -#ifndef CONFIG_COMMON_CLK -unsigned long clk_get_rate_all_locked(struct clk *c); -#endif - -void tegra2_sdmmc_tap_delay(struct clk *c, int delay); -int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting); - -#endif |