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authorJoseph Lo <josephl@nvidia.com>2012-08-16 17:31:50 +0800
committerStephen Warren <swarren@nvidia.com>2012-09-13 11:41:06 -0600
commitc2be5bfcc986e688c0c9b427b9fb33be178437d8 (patch)
tree66d900ceb5b57fe3e8008e0d0480518b3046eb9c /arch/arm/mach-tegra/sleep.S
parentARM: tegra: replace the CPU CAR access code by tegra_cpu_car_ops (diff)
downloadlinux-dev-c2be5bfcc986e688c0c9b427b9fb33be178437d8.tar.xz
linux-dev-c2be5bfcc986e688c0c9b427b9fb33be178437d8.zip
ARM: tegra: clean up the common assembly macros into sleep.h
There are some common macros for Tegra low-level assembly code. Clean up them into one header file and move the definitions that will be re-used into it as well. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep.S')
-rw-r--r--arch/arm/mach-tegra/sleep.S33
1 files changed, 1 insertions, 32 deletions
diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S
index d29b156a8011..ea81554c4833 100644
--- a/arch/arm/mach-tegra/sleep.S
+++ b/arch/arm/mach-tegra/sleep.S
@@ -29,36 +29,5 @@
#include <mach/iomap.h>
#include "flowctrl.h"
+#include "sleep.h"
-#define TEGRA_FLOW_CTRL_VIRT (TEGRA_FLOW_CTRL_BASE - IO_PPSB_PHYS \
- + IO_PPSB_VIRT)
-
-/* returns the offset of the flow controller halt register for a cpu */
-.macro cpu_to_halt_reg rd, rcpu
- cmp \rcpu, #0
- subne \rd, \rcpu, #1
- movne \rd, \rd, lsl #3
- addne \rd, \rd, #0x14
- moveq \rd, #0
-.endm
-
-/* returns the offset of the flow controller csr register for a cpu */
-.macro cpu_to_csr_reg rd, rcpu
- cmp \rcpu, #0
- subne \rd, \rcpu, #1
- movne \rd, \rd, lsl #3
- addne \rd, \rd, #0x18
- moveq \rd, #8
-.endm
-
-/* returns the ID of the current processor */
-.macro cpu_id, rd
- mrc p15, 0, \rd, c0, c0, 5
- and \rd, \rd, #0xF
-.endm
-
-/* loads a 32-bit value into a register without a data access */
-.macro mov32, reg, val
- movw \reg, #:lower16:\val
- movt \reg, #:upper16:\val
-.endm