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| author |   Prashant Gaikwad <pgaikwad@nvidia.com> | 2013-01-11 13:16:19 +0530 |
|---|---|---|
| committer |   Stephen Warren <swarren@nvidia.com> | 2013-01-28 11:19:06 -0700 |
| commit | c7736edf1b1734455c186deec53a0aa7f8fa87ea (patch) | |
| tree | c2333faf5e2dacb726f60591ddb1e27d611dc7d4 /arch/arm/mach-tegra | |
| parent | ARM: tegra: fix compile error when disable CPU_IDLE (diff) | |
| download | linux-dev-c7736edf1b1734455c186deec53a0aa7f8fa87ea.tar.xz linux-dev-c7736edf1b1734455c186deec53a0aa7f8fa87ea.zip | |
ARM: tegra: add function to read chipid
Add function to read chip id from APB MISC registers. This function
will also get called from clock driver to flush write operations on
apb bus.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra')
| -rw-r--r-- | arch/arm/mach-tegra/fuse.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index 8121742711fe..f7db0782a6b6 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -20,6 +20,7 @@ #include <linux/kernel.h> #include <linux/io.h> #include <linux/export.h> +#include <linux/tegra-soc.h> #include "fuse.h" #include "iomap.h" @@ -105,6 +106,11 @@ static void tegra_get_process_id(void) tegra_core_process_id = (reg >> 12) & 3; } +u32 tegra_read_chipid(void) +{ + return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); +} + void tegra_init_fuse(void) { u32 id; @@ -119,7 +125,7 @@ void tegra_init_fuse(void) reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT; - id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); + id = tegra_read_chipid(); tegra_chip_id = (id >> 8) & 0xff; switch (tegra_chip_id) { |