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| author |   Rabin Vincent <rabin.vincent@stericsson.com> | 2010-05-03 07:39:02 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2010-05-04 17:50:02 +0100 |
| commit | 178980f98eef58607647eb66e178bf984bf81f4c (patch) | |
| tree | 42b536e6e9ffb447a3b070a44a8219aed424e4d0 /arch/arm/mach-ux500/cpu.c | |
| parent | ARM: 6079/1: ux500: allow choice of the DEBUG_LL UART (diff) | |
| download | linux-dev-178980f98eef58607647eb66e178bf984bf81f4c.tar.xz linux-dev-178980f98eef58607647eb66e178bf984bf81f4c.zip | |
ARM: 6080/1: ux500: move irq and common maps to cpu.c
Move IRQ initialization and common io mapping setup code to cpu.c,
renaming U8500* to UX500* along the way.
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ux500/cpu.c')
| -rw-r--r-- | arch/arm/mach-ux500/cpu.c | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c new file mode 100644 index 000000000000..e6a8058cd735 --- /dev/null +++ b/arch/arm/mach-ux500/cpu.c @@ -0,0 +1,68 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson + * License terms: GNU General Public License (GPL) version 2 + */ + +#include <linux/platform_device.h> +#include <linux/amba/bus.h> +#include <linux/io.h> +#include <linux/clk.h> + +#include <asm/hardware/cache-l2x0.h> +#include <asm/hardware/gic.h> +#include <asm/mach/map.h> + +#include <mach/hardware.h> +#include <mach/setup.h> + +#include "clock.h" + +static struct map_desc ux500_io_desc[] __initdata = { + __IO_DEV_DESC(UX500_UART0_BASE, SZ_4K), + __IO_DEV_DESC(UX500_UART2_BASE, SZ_4K), + + __IO_DEV_DESC(UX500_GIC_CPU_BASE, SZ_4K), + __IO_DEV_DESC(UX500_GIC_DIST_BASE, SZ_4K), + __IO_DEV_DESC(UX500_L2CC_BASE, SZ_4K), + __IO_DEV_DESC(UX500_TWD_BASE, SZ_4K), + __IO_DEV_DESC(UX500_SCU_BASE, SZ_4K), + + __IO_DEV_DESC(UX500_CLKRST1_BASE, SZ_4K), + __IO_DEV_DESC(UX500_CLKRST2_BASE, SZ_4K), + __IO_DEV_DESC(UX500_CLKRST3_BASE, SZ_4K), + __IO_DEV_DESC(UX500_CLKRST5_BASE, SZ_4K), + __IO_DEV_DESC(UX500_CLKRST6_BASE, SZ_4K), + + __IO_DEV_DESC(UX500_MTU0_BASE, SZ_4K), + __IO_DEV_DESC(UX500_MTU1_BASE, SZ_4K), + + __IO_DEV_DESC(UX500_BACKUPRAM0_BASE, SZ_8K), +}; + +void __init ux500_map_io(void) +{ + iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc)); +} + +void __init ux500_init_irq(void) +{ + gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29); + gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE)); +} + +#ifdef CONFIG_CACHE_L2X0 +static int ux500_l2x0_init(void) +{ + void __iomem *l2x0_base; + + l2x0_base = __io_address(UX500_L2CC_BASE); + + /* 64KB way size, 8 way associativity, force WA */ + l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff); + + return 0; +} +early_initcall(ux500_l2x0_init); +#endif |