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| author |   Lubomir Rintel <lkundrak@v3.sk> | 2019-06-07 23:28:20 +0200 |
|---|---|---|
| committer | Lubomir Rintel <lkundrak@v3.sk> | 2019-10-17 16:36:10 +0200 |
| commit | df8bf2d8a02082aba00dfbe6b93573fb008939d0 (patch) | |
| tree | b5e76a7af0ec22e1054041fc4d3ee8179a0d0c20 /arch/arm/mm/Kconfig | |
| parent | ARM: l2c: add definition for FWA in PL310 aux register (diff) | |
| download | linux-dev-df8bf2d8a02082aba00dfbe6b93573fb008939d0.tar.xz linux-dev-df8bf2d8a02082aba00dfbe6b93573fb008939d0.zip | |
ARM: mmp: don't select CACHE_TAUROS2 on all ARCH_MMP
MMP3 has a PJ4B with a Tauros 3 cache controller that uses CACHE_L2X0
instead, while CACHE_TAUROS2 is present on PJ4 and PJ1 (Mohawk) based
platforms only.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 0ab3a86b1f52..da31f223242a 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -1041,7 +1041,7 @@ endif config CACHE_TAUROS2 bool "Enable the Tauros2 L2 cache controller" - depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4) + depends on (CPU_MOHAWK || CPU_PJ4) default y select OUTER_CACHE help |