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authorLinus Torvalds <torvalds@linux-foundation.org>2011-09-10 17:28:46 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-09-10 17:28:46 -0700
commitd0a77454c70d0449a5f87087deb8f0cb15145e90 (patch)
treea6efb34357756faede3fd63f5a72e72977c68321 /arch/arm/mm/cache-l2x0.c
parentbacklight: Declare backlight_types[] const (diff)
parentARM: 7088/1: entry: fix wrong parameter name used in do_thumb_abort (diff)
downloadlinux-dev-d0a77454c70d0449a5f87087deb8f0cb15145e90.tar.xz
linux-dev-d0a77454c70d0449a5f87087deb8f0cb15145e90.zip
Merge branch 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: ARM: 7088/1: entry: fix wrong parameter name used in do_thumb_abort ARM: 7080/1: l2x0: make sure I&D are not locked down on init ARM: 7081/1: mach-integrator: fix the clocksource NET: am79c961: fix race in link status code ARM: 7067/1: mm: keep significant bits in pfn_valid
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r--arch/arm/mm/cache-l2x0.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 44c086710d2b..9ecfdb511951 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -277,6 +277,25 @@ static void l2x0_disable(void)
spin_unlock_irqrestore(&l2x0_lock, flags);
}
+static void __init l2x0_unlock(__u32 cache_id)
+{
+ int lockregs;
+ int i;
+
+ if (cache_id == L2X0_CACHE_ID_PART_L310)
+ lockregs = 8;
+ else
+ /* L210 and unknown types */
+ lockregs = 1;
+
+ for (i = 0; i < lockregs; i++) {
+ writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
+ i * L2X0_LOCKDOWN_STRIDE);
+ writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
+ i * L2X0_LOCKDOWN_STRIDE);
+ }
+}
+
void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
{
__u32 aux;
@@ -328,6 +347,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
* accessing the below registers will fault.
*/
if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
+ /* Make sure that I&D is not locked down when starting */
+ l2x0_unlock(cache_id);
/* l2x0 controller is disabled */
writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);