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| author |   Peter Horton <phorton@bitbox.co.uk> | 2010-12-06 11:37:38 +0000 |
|---|---|---|
| committer |   Sascha Hauer <s.hauer@pengutronix.de> | 2010-12-14 09:54:37 +0100 |
| commit | cdc3f10630ecddb7870e087ff9679eef3d7b4e21 (patch) | |
| tree | bcffe39f52a334e9ad8e56b15843a42e228988da /arch/arm/plat-mxc/avic.c | |
| parent | ARM: imx/mx27_3ds: Add watchdog support (diff) | |
| download | linux-dev-cdc3f10630ecddb7870e087ff9679eef3d7b4e21.tar.xz linux-dev-cdc3f10630ecddb7870e087ff9679eef3d7b4e21.zip | |
mx51: support FIQ on TZIC, revised
Add support for FIQ on mx51 TZIC
TZIC changes tested with FIQ audio on an mx51 board
AVIC changes build with mx3_defconfig, not tested
Signed-off-by: Peter Horton <phorton@bitbox.co.uk>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/avic.c')
| -rw-r--r-- | arch/arm/plat-mxc/avic.c | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 7331f2ace5fe..9a4e8a22dd0a 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -24,6 +24,8 @@ #include <asm/mach/irq.h> #include <mach/hardware.h> +#include "irq-common.h" + #define AVIC_INTCNTL 0x00 /* int control reg */ #define AVIC_NIMASK 0x04 /* int mask reg */ #define AVIC_INTENNUM 0x08 /* int enable number reg */ @@ -46,9 +48,9 @@ void __iomem *avic_base; -int imx_irq_set_priority(unsigned char irq, unsigned char prio) -{ #ifdef CONFIG_MXC_IRQ_PRIOR +static int avic_irq_set_priority(unsigned char irq, unsigned char prio) +{ unsigned int temp; unsigned int mask = 0x0F << irq % 8 * 4; @@ -62,14 +64,11 @@ int imx_irq_set_priority(unsigned char irq, unsigned char prio) __raw_writel(temp, avic_base + AVIC_NIPRIORITY(irq / 8)); return 0; -#else - return -ENOSYS; -#endif } -EXPORT_SYMBOL(imx_irq_set_priority); +#endif #ifdef CONFIG_FIQ -int mxc_set_irq_fiq(unsigned int irq, unsigned int type) +static int avic_set_irq_fiq(unsigned int irq, unsigned int type) { unsigned int irqt; @@ -87,7 +86,6 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type) return 0; } -EXPORT_SYMBOL(mxc_set_irq_fiq); #endif /* CONFIG_FIQ */ /* Disable interrupt number "irq" in the AVIC */ @@ -102,10 +100,18 @@ static void mxc_unmask_irq(unsigned int irq) __raw_writel(irq, avic_base + AVIC_INTENNUM); } -static struct irq_chip mxc_avic_chip = { - .ack = mxc_mask_irq, - .mask = mxc_mask_irq, - .unmask = mxc_unmask_irq, +static struct mxc_irq_chip mxc_avic_chip = { + .base = { + .ack = mxc_mask_irq, + .mask = mxc_mask_irq, + .unmask = mxc_unmask_irq, + }, +#ifdef CONFIG_MXC_IRQ_PRIOR + .set_priority = avic_irq_set_priority, +#endif +#ifdef CONFIG_FIQ + .set_irq_fiq = avic_set_irq_fiq, +#endif }; /* @@ -133,7 +139,7 @@ void __init mxc_init_irq(void __iomem *irqbase) __raw_writel(0, avic_base + AVIC_INTTYPEH); __raw_writel(0, avic_base + AVIC_INTTYPEL); for (i = 0; i < MXC_INTERNAL_IRQS; i++) { - set_irq_chip(i, &mxc_avic_chip); + set_irq_chip(i, &mxc_avic_chip.base); set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } |