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| author |   Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-02-25 14:01:49 +0100 |
|---|---|---|
| committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-02-25 14:01:49 +0100 |
| commit | 9b1489e989695c4d502865f8bec616c0f17e99ab (patch) | |
| tree | 9f90bcc7491bec06db0463d5f24f1ac19b8becc4 /arch/arm/plat-mxc/include/mach/irqs.h | |
| parent | arm/imx/iomux-v1: check for invalid modes in mxc_gpio_mode (diff) | |
| parent | mx25: move ARCH_MXC_IOMUX_V3 to the ARCH level (diff) | |
| download | linux-dev-9b1489e989695c4d502865f8bec616c0f17e99ab.tar.xz linux-dev-9b1489e989695c4d502865f8bec616c0f17e99ab.zip | |
Merge branch 'mxc-master' of git://git.pengutronix.de/git/imx/linux-2.6 into imx/master
Removed selection of COMMON_CLKDEV by CONFIG_ARCH_MX5. This is handled
in 03e09cd8902717b66f940357257d8ad76114d9f2.
arch/arm/plat-mxc/iomux-mx1-mx2.c was moved to
arch/arm/plat-mxc/iomux-v1.c in 5e2e95f520538e095d10456acd28d9107317aa32
and got bug fixed in 5c17ef878fa25e04b1e8f1d8f5fa8b267753472c. The bug
in arch/arm/plat-mxc/iomux-v1.c isn't present any more since
bac3fcfad565c9bbceeed8b607f140c29df97355, so
arch/arm/plat-mxc/iomux-mx1-mx2.c is simply deleted.
Conflicts:
arch/arm/plat-mxc/Kconfig
arch/arm/plat-mxc/Makefile
arch/arm/plat-mxc/iomux-mx1-mx2.c
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/irqs.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/irqs.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index 7ebdd7191495..86781f7b0c0c 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -12,9 +12,13 @@ #define __ASM_ARCH_MXC_IRQS_H__ /* - * So far all i.MX SoCs have 64 internal interrupts + * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64 */ +#ifdef CONFIG_MXC_TZIC +#define MXC_INTERNAL_IRQS 128 +#else #define MXC_INTERNAL_IRQS 64 +#endif #define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS @@ -25,6 +29,8 @@ #define MXC_GPIO_IRQS (32 * 4) #elif defined CONFIG_ARCH_MX25 #define MXC_GPIO_IRQS (32 * 4) +#elif defined CONFIG_ARCH_MX5 +#define MXC_GPIO_IRQS (32 * 4) #elif defined CONFIG_ARCH_MXC91231 #define MXC_GPIO_IRQS (32 * 4) #elif defined CONFIG_ARCH_MX3 @@ -52,6 +58,7 @@ #else #define MX3_IPU_IRQS 0 #endif +/* REVISIT: Add IPU irqs on IMX51 */ #define NR_IRQS (MXC_IPU_IRQ_START + MX3_IPU_IRQS) |