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| author |   Arnd Bergmann <arnd@arndb.de> | 2012-01-03 20:27:45 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-03 20:27:45 +0000 |
| commit | 5d3cb0ffdd0c8987dc17a2ef4529b246198ceb72 (patch) | |
| tree | c60bdca0529cbd44d32b3918b78d14e182ef57cd /arch/arm/plat-mxc | |
| parent | Merge branch 'omap/uart' into next/pm (diff) | |
| parent | Linux 3.2-rc7 (diff) | |
| download | linux-dev-5d3cb0ffdd0c8987dc17a2ef4529b246198ceb72.tar.xz linux-dev-5d3cb0ffdd0c8987dc17a2ef4529b246198ceb72.zip | |
Merge branch 'v3.2-rc7' into next/pm
Conflicts:
arch/arm/kernel/setup.c
arch/arm/mach-shmobile/board-kota2.c
Diffstat (limited to 'arch/arm/plat-mxc')
| -rw-r--r-- | arch/arm/plat-mxc/cpufreq.c | 1 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/pwm.c | 7 |
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c index 74aac96cda20..adbff706ef6f 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/plat-mxc/cpufreq.c @@ -17,6 +17,7 @@ * the CPU clock speed on the fly. */ +#include <linux/module.h> #include <linux/cpufreq.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 42d74ea59084..845de59f07ed 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c @@ -32,6 +32,9 @@ #define MX3_PWMSAR 0x0C /* PWM Sample Register */ #define MX3_PWMPR 0x10 /* PWM Period Register */ #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) +#define MX3_PWMCR_DOZEEN (1 << 24) +#define MX3_PWMCR_WAITEN (1 << 23) +#define MX3_PWMCR_DBGEN (1 << 22) #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) #define MX3_PWMCR_CLKSRC_IPG (1 << 16) #define MX3_PWMCR_EN (1 << 0) @@ -77,7 +80,9 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); writel(period_cycles, pwm->mmio_base + MX3_PWMPR); - cr = MX3_PWMCR_PRESCALER(prescale) | MX3_PWMCR_EN; + cr = MX3_PWMCR_PRESCALER(prescale) | + MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | + MX3_PWMCR_DBGEN | MX3_PWMCR_EN; if (cpu_is_mx25()) cr |= MX3_PWMCR_CLKSRC_IPG; |