diff options
| author |   Sascha Hauer <s.hauer@pengutronix.de> | 2009-06-04 12:19:02 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-08-07 12:10:51 +0200 |
| commit | be124c94279edf4306798100f120c386947d8724 (patch) | |
| tree | 98bc16285b121af329a4ce2c42e1690decf35e70 /arch/arm/plat-mxc | |
| parent | MXC: pass base/irq to mxc_timer_init (diff) | |
| download | linux-dev-be124c94279edf4306798100f120c386947d8724.tar.xz linux-dev-be124c94279edf4306798100f120c386947d8724.zip | |
system.c: runtime base address
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 1 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/system.c | 22 |
2 files changed, 14 insertions, 9 deletions
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 1c48aefe4b6e..1dc31d6dd43f 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -29,5 +29,6 @@ extern int mx35_clocks_init(void); extern int mxc_register_gpios(void); extern int mxc_register_device(struct platform_device *pdev, void *data); extern void mxc_set_cpu_type(unsigned int type); +extern void mxc_arch_reset_init(void __iomem *); #endif diff --git a/arch/arm/plat-mxc/system.c b/arch/arm/plat-mxc/system.c index 79c37577c916..15e30532f4a5 100644 --- a/arch/arm/plat-mxc/system.c +++ b/arch/arm/plat-mxc/system.c @@ -30,29 +30,28 @@ #include <asm/proc-fns.h> #include <asm/system.h> -#ifdef CONFIG_ARCH_MX1 -#define WDOG_WCR_REG IO_ADDRESS(WDT_BASE_ADDR) -#define WDOG_WCR_ENABLE (1 << 0) -#else -#define WDOG_WCR_REG IO_ADDRESS(WDOG_BASE_ADDR) -#define WDOG_WCR_ENABLE (1 << 2) -#endif +static void __iomem *wdog_base; /* * Reset the system. It is called by machine_restart(). */ void arch_reset(char mode, const char *cmd) { - if (!cpu_is_mx1()) { + unsigned int wcr_enable; + + if (cpu_is_mx1()) { + wcr_enable = (1 << 0); + } else { struct clk *clk; clk = clk_get_sys("imx-wdt.0", NULL); if (!IS_ERR(clk)) clk_enable(clk); + wcr_enable = (1 << 2); } /* Assert SRS signal */ - __raw_writew(WDOG_WCR_ENABLE, WDOG_WCR_REG); + __raw_writew(wcr_enable, wdog_base); /* wait for reset to assert... */ mdelay(500); @@ -65,3 +64,8 @@ void arch_reset(char mode, const char *cmd) /* we'll take a jump through zero as a poor second */ cpu_reset(0); } + +void mxc_arch_reset_init(void __iomem *base) +{ + wdog_base = base; +} |