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| author |   Vegard Nossum <vegard.nossum@gmail.com> | 2009-06-15 15:50:49 +0200 |
|---|---|---|
| committer | Vegard Nossum <vegard.nossum@gmail.com> | 2009-06-15 15:50:49 +0200 |
| commit | 722f2a6c87f34ee0fd0130a8cf45f81e0705594a (patch) | |
| tree | 50b054df34d2731eb0ba0cf1a6c27e43e7eed428 /arch/arm/plat-stmp3xxx/include/mach/debug-macro.S | |
| parent | signal: fix __send_signal() false positive kmemcheck warning (diff) | |
| parent | Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-next (diff) | |
| download | linux-dev-722f2a6c87f34ee0fd0130a8cf45f81e0705594a.tar.xz linux-dev-722f2a6c87f34ee0fd0130a8cf45f81e0705594a.zip | |
Merge commit 'linus/master' into HEAD
Conflicts:
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Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
Diffstat (limited to 'arch/arm/plat-stmp3xxx/include/mach/debug-macro.S')
| -rw-r--r-- | arch/arm/plat-stmp3xxx/include/mach/debug-macro.S | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/plat-stmp3xxx/include/mach/debug-macro.S b/arch/arm/plat-stmp3xxx/include/mach/debug-macro.S new file mode 100644 index 000000000000..fb3b969bf0a2 --- /dev/null +++ b/arch/arm/plat-stmp3xxx/include/mach/debug-macro.S @@ -0,0 +1,42 @@ +/* + * Debugging macro include header + * + * Embedded Alley Solutions, Inc <source@embeddedalley.com> + * + * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + */ + +/* + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x80000000 @ physical base address + addeq \rx, \rx, #0x00070000 + movne \rx, #0xf0000000 @ virtual base + addne \rx, \rx, #0x00070000 + .endm + + .macro senduart,rd,rx + strb \rd, [\rx, #0] @ data register at 0 + .endm + + .macro waituart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full + bne 1001b + .endm + + .macro busyuart,rd,rx +1001: ldr \rd, [\rx, #0x18] @ UARTFLG + tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy + bne 1001b + .endm |