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| author |   Thor Thayer <thor.thayer@linux.intel.com> | 2018-06-27 12:50:27 -0500 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2018-07-02 08:44:15 -0500 |
| commit | 70455ac7ffb6b707af1e56e1993af82906fddaae (patch) | |
| tree | fc04345adf5824202599305e7d90f6a5298c0b98 /arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | |
| parent | ARM: dts: Add SPI0 node for Arria10 (diff) | |
| download | linux-dev-70455ac7ffb6b707af1e56e1993af82906fddaae.tar.xz linux-dev-70455ac7ffb6b707af1e56e1993af82906fddaae.zip | |
arm64: dts: stratix10: Add SPI node clocks for Stratix10
Add the required clocks for the new Stratix10 clock bindings
to the SPI nodes.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index a77bde19a9d3..d033da401c26 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -316,6 +316,7 @@ resets = <&rst SPIM0_RESET>; reg-io-width = <4>; num-cs = <4>; + clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; status = "disabled"; }; @@ -328,6 +329,7 @@ resets = <&rst SPIM1_RESET>; reg-io-width = <4>; num-cs = <4>; + clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; status = "disabled"; }; |