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authorArnd Bergmann <arnd@arndb.de>2019-02-15 15:38:40 +0100
committerArnd Bergmann <arnd@arndb.de>2019-02-15 15:38:59 +0100
commitf5691ad1724d08d9bd50d6d267b6df8bb41c8361 (patch)
tree2eac3e747d410eb8948b5bfbfabf0ada704bc0e7 /arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
parentMerge tag 'hisi-arm64-dt-for-5.1v2' of git://github.com/hisilicon/linux-hisi into arm/dt (diff)
parentARM: dts: socfpga: update more missing reset properties (diff)
downloadlinux-dev-f5691ad1724d08d9bd50d6d267b6df8bb41c8361.tar.xz
linux-dev-f5691ad1724d08d9bd50d6d267b6df8bb41c8361.zip
Merge tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.1 - Add SMMU node for Stratix10 - Add vendor prefix fo Novtech - Add a new 96Boards Chameleon96 board that uses a Cyclone5 SoCFPGA - Add missing reset properties for all IP on Cyclone5 and Arria10 * tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: socfpga: update more missing reset properties ARM: dts: socfpga: update missing reset property peripherals ARM: dts: Add support for 96Boards Chameleon96 board dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix arm64: dts: stratix10: Add Stratix10 SMMU support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi')
-rw-r--r--arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi29
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index af4d00741644..7c649f6b14cb 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -161,6 +161,7 @@
tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
+ iommus = <&smmu 1>;
status = "disabled";
};
@@ -177,6 +178,7 @@
tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
+ iommus = <&smmu 2>;
status = "disabled";
};
@@ -193,6 +195,7 @@
tx-fifo-depth = <16384>;
rx-fifo-depth = <16384>;
snps,multicast-filter-bins = <256>;
+ iommus = <&smmu 3>;
status = "disabled";
};
@@ -303,6 +306,7 @@
clocks = <&clkmgr STRATIX10_L4_MP_CLK>,
<&clkmgr STRATIX10_SDMMC_CLK>;
clock-names = "biu", "ciu";
+ iommus = <&smmu 5>;
status = "disabled";
};
@@ -336,6 +340,29 @@
reg = <0xffd11000 0x1000>;
};
+ smmu: iommu@fa000000 {
+ compatible = "arm,mmu-500", "arm,smmu-v2";
+ reg = <0xfa000000 0x40000>;
+ #global-interrupts = <2>;
+ #iommu-cells = <1>;
+ clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
+ clock-names = "iommu";
+ interrupt-parent = <&intc>;
+ interrupts = <0 128 4>, /* Global Secure Fault */
+ <0 129 4>, /* Global Non-secure Fault */
+ /* Non-secure Context Interrupts (32) */
+ <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>,
+ <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>,
+ <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>,
+ <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>,
+ <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>,
+ <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>,
+ <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>,
+ <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>;
+ stream-match-mask = <0x7ff0>;
+ status = "disabled";
+ };
+
spi0: spi@ffda4000 {
compatible = "snps,dw-apb-ssi";
#address-cells = <1>;
@@ -445,6 +472,7 @@
resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>;
reset-names = "dwc2", "dwc2-ecc";
clocks = <&clkmgr STRATIX10_USB_CLK>;
+ iommus = <&smmu 6>;
status = "disabled";
};
@@ -457,6 +485,7 @@
resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>;
reset-names = "dwc2", "dwc2-ecc";
clocks = <&clkmgr STRATIX10_USB_CLK>;
+ iommus = <&smmu 7>;
status = "disabled";
};