diff options
author | 2014-12-09 17:17:47 -0800 | |
---|---|---|
committer | 2014-12-09 17:17:47 -0800 | |
commit | ed8efd2de75479a175bd21df073d9e97df65a820 (patch) | |
tree | ced8d7eaac311de88c88b5536edeecd4db6b7ae2 /arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi | |
parent | Merge tag 'defconfig-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc (diff) | |
parent | arm64: amd-seattle: Fix PCI bus range due to SMMU limitation (diff) | |
download | linux-dev-ed8efd2de75479a175bd21df073d9e97df65a820.tar.xz linux-dev-ed8efd2de75479a175bd21df073d9e97df65a820.zip |
Merge tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM64 SoC changes from Arnd Bergmann:
"This adds support for two new ARM64 platforms:
- ARM Juno
- AMD Seattle
We had submissions for a number of additional platforms from Samsung,
Freescale and Spreadtrum but are still working out the best process
for getting these merged"
* tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: amd-seattle: Fix PCI bus range due to SMMU limitation
arm64: ARM: Fix the Generic Timers interrupt active level description
arm64: amd-seattle: Adding device tree for AMD Seattle platform
arm64: Add Juno board device tree.
arm64: Create link to include/dt-bindings to enable C preprocessor use.
Diffstat (limited to 'arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi new file mode 100644 index 000000000000..f623c46525a6 --- /dev/null +++ b/arch/arm64/boot/dts/amd/amd-seattle-clks.dtsi @@ -0,0 +1,54 @@ +/* + * DTS file for AMD Seattle Clocks + * + * Copyright (C) 2014 Advanced Micro Devices, Inc. + */ + + adl3clk_100mhz: clk100mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "adl3clk_100mhz"; + }; + + ccpclk_375mhz: clk375mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <375000000>; + clock-output-names = "ccpclk_375mhz"; + }; + + sataclk_333mhz: clk333mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <333000000>; + clock-output-names = "sataclk_333mhz"; + }; + + pcieclk_500mhz: clk500mhz_0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <500000000>; + clock-output-names = "pcieclk_500mhz"; + }; + + dmaclk_500mhz: clk500mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <500000000>; + clock-output-names = "dmaclk_500mhz"; + }; + + miscclk_250mhz: clk250mhz_4 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <250000000>; + clock-output-names = "miscclk_250mhz"; + }; + + uartspiclk_100mhz: clk100mhz_1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "uartspiclk_100mhz"; + }; |