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| author |   Ard Biesheuvel <ardb@kernel.org> | 2019-12-03 15:23:06 +0000 |
|---|---|---|
| committer |   Arnd Bergmann <arnd@arndb.de> | 2022-03-24 19:49:55 +0100 |
| commit | 6a2f0b2d3b74e3e4002dc4143887637cd216e531 (patch) | |
| tree | 03e964188f1776ac234d01f65dcfb52194ad9798 /arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | |
| parent | dt: amd-seattle: disable IPMI controller and some GPIO blocks on B0 (diff) | |
| download | linux-dev-6a2f0b2d3b74e3e4002dc4143887637cd216e531.tar.xz linux-dev-6a2f0b2d3b74e3e4002dc4143887637cd216e531.zip | |
dt: amd-seattle: add a description of the CPUs and caches
Add a DT description of the CPU and cache hierarchy as found on
the AMD Seattle SOC. Given the tight coupling of the PMU with
the CPUs, move the PMU node into the cpu .dtsi file as well, and
add the missing affinity description.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi index 547a6bf10f5e..690020589d41 100644 --- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi +++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi @@ -38,18 +38,6 @@ <1 10 0xff04>; }; - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0 7 4>, - <0 8 4>, - <0 9 4>, - <0 10 4>, - <0 11 4>, - <0 12 4>, - <0 13 4>, - <0 14 4>; - }; - smb0: smb { compatible = "simple-bus"; #address-cells = <2>; |